diff mbox series

arm64: dts: imx8mp: Add NPU Node

Message ID 20231019022300.1588041-1-aford173@gmail.com
State Accepted
Commit 4bedc468b725d55655dc8c9f5528932f4d77ccb0
Headers show
Series arm64: dts: imx8mp: Add NPU Node | expand

Commit Message

Adam Ford Oct. 19, 2023, 2:23 a.m. UTC 
The NPU is based on the Vivante GC8000 and it enumerates as

 etnaviv-gpu 38500000.npu: model: GC8000, revision: 8002

Signed-off-by: Adam Ford <aford173@gmail.com>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index c9a610ba4836..1ef8d17726ac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2012,6 +2012,25 @@  vpumix_blk_ctrl: blk-ctrl@38330000 {
 			interconnect-names = "g1", "g2", "vc8000e";
 		};
 
+		npu: npu@38500000 {
+			compatible = "vivante,gc";
+			reg = <0x38500000 0x20000>;
+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_NPU_ROOT>,
+				 <&clk IMX8MP_CLK_NPU_ROOT>,
+				 <&clk IMX8MP_CLK_ML_AXI>,
+				 <&clk IMX8MP_CLK_ML_AHB>;
+			clock-names = "core", "shader", "bus", "reg";
+			assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
+				  <&clk IMX8MP_CLK_ML_AXI>,
+				  <&clk IMX8MP_CLK_ML_AHB>;
+			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
+					 <&clk IMX8MP_SYS_PLL1_800M>,
+					 <&clk IMX8MP_SYS_PLL1_800M>;
+			assigned-clock-rates = <1000000000>, <800000000>, <400000000>;
+			power-domains = <&pgc_mlmix>;
+		};
+
 		gic: interrupt-controller@38800000 {
 			compatible = "arm,gic-v3";
 			reg = <0x38800000 0x10000>,