diff mbox series

[v10,09/50] x86/traps: Define RMP violation #PF error code

Message ID 20231016132819.1002933-10-michael.roth@amd.com
State New
Headers show
Series Add AMD Secure Nested Paging (SEV-SNP) Hypervisor Support | expand

Commit Message

Michael Roth Oct. 16, 2023, 1:27 p.m. UTC 
From: Brijesh Singh <brijesh.singh@amd.com>

Bit 31 in the page fault-error bit will be set when processor encounters
an RMP violation.

While at it, use the BIT() macro.

Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off by: Ashish Kalra <ashish.kalra@amd.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
---
 arch/x86/include/asm/trap_pf.h | 4 ++++
 arch/x86/mm/fault.c            | 1 +
 2 files changed, 5 insertions(+)

Comments

Michael Roth Oct. 16, 2023, 2:55 p.m. UTC | #1 
On Mon, Oct 16, 2023 at 07:14:07AM -0700, Dave Hansen wrote:
> On 10/16/23 06:27, Michael Roth wrote:
> > Bit 31 in the page fault-error bit will be set when processor encounters
> > an RMP violation. While at it, use the BIT() macro.
> 
> Any idea where the BIT() use went?  I remember seeing it in earlier
> versions.

Yah... this patch used to convert all the previous definitions over to
using BIT() as part of introducing the new RMP bit. I'm not sure what
happened, but a likely possibility is I hit a merge conflict at some
point due to upstream commit fd5439e0c9, which introduced this change:

  X86_PF_SHSTK    =               1 << 6,

and my brain probably defaulted to using the existing pattern to
resolve it. I'll get this fixed up.

-Mike
diff mbox series

Patch

diff --git a/arch/x86/include/asm/trap_pf.h b/arch/x86/include/asm/trap_pf.h
index afa524325e55..136707d7a961 100644
--- a/arch/x86/include/asm/trap_pf.h
+++ b/arch/x86/include/asm/trap_pf.h
@@ -2,6 +2,8 @@ 
 #ifndef _ASM_X86_TRAP_PF_H
 #define _ASM_X86_TRAP_PF_H
 
+#include <linux/bits.h>  /* BIT() macro */
+
 /*
  * Page fault error code bits:
  *
@@ -13,6 +15,7 @@ 
  *   bit 5 ==				1: protection keys block access
  *   bit 6 ==				1: shadow stack access fault
  *   bit 15 ==				1: SGX MMU page-fault
+ *   bit 31 ==				1: fault was due to RMP violation
  */
 enum x86_pf_error_code {
 	X86_PF_PROT	=		1 << 0,
@@ -23,6 +26,7 @@  enum x86_pf_error_code {
 	X86_PF_PK	=		1 << 5,
 	X86_PF_SHSTK	=		1 << 6,
 	X86_PF_SGX	=		1 << 15,
+	X86_PF_RMP	=		1 << 31,
 };
 
 #endif /* _ASM_X86_TRAP_PF_H */
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index ab778eac1952..7858b9515d4a 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -547,6 +547,7 @@  show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad
 		 !(error_code & X86_PF_PROT) ? "not-present page" :
 		 (error_code & X86_PF_RSVD)  ? "reserved bit violation" :
 		 (error_code & X86_PF_PK)    ? "protection keys violation" :
+		 (error_code & X86_PF_RMP)   ? "RMP violation" :
 					       "permissions violation");
 
 	if (!(error_code & X86_PF_USER) && user_mode(regs)) {