[20/21] arm64: defconfig: Enable Google Tensor SoC

From: Peter Griffin <peter.griffin@linaro.org>
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org,
        tomasz.figa@gmail.com, s.nawrocki@samsung.com,
        linus.walleij@linaro.org, wim@linux-watchdog.org,
        linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org,
        arnd@arndb.de, olof@lixom.net, cw00.choi@samsung.com
Cc: peter.griffin@linaro.org, tudor.ambarus@linaro.org,
        andre.draszik@linaro.org, semen.protsenko@linaro.org,
        soc@kernel.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org
Subject: [PATCH 20/21] arm64: defconfig: Enable Google Tensor SoC
Date: Thu,  5 Oct 2023 16:56:17 +0100
Message-ID: <20231005155618.700312-21-peter.griffin@linaro.org>
In-Reply-To: <20231005155618.700312-1-peter.griffin@linaro.org>
References: <20231005155618.700312-1-peter.griffin@linaro.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Message ID	20231005155618.700312-21-peter.griffin@linaro.org
State	Superseded
Headers	show Return-Path: <linux-gpio-owner@vger.kernel.org> From: Peter Griffin <peter.griffin@linaro.org> To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org, tomasz.figa@gmail.com, s.nawrocki@samsung.com, linus.walleij@linaro.org, wim@linux-watchdog.org, linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, olof@lixom.net, cw00.choi@samsung.com Cc: peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, semen.protsenko@linaro.org, soc@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: [PATCH 20/21] arm64: defconfig: Enable Google Tensor SoC Date: Thu, 5 Oct 2023 16:56:17 +0100 Message-ID: <20231005155618.700312-21-peter.griffin@linaro.org> In-Reply-To: <20231005155618.700312-1-peter.griffin@linaro.org> References: <20231005155618.700312-1-peter.griffin@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board \| expand [00/21] Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board [01/21] dt-bindings: interrupt-controller: Add gs101 interrupt controller [02/21] dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible [03/21] dt-bindings: clock: Add Google gs101 clock management unit bindings [04/21] dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 [05/21] dt-bindings: watchdog: Document Google gs101 & gs201 watchdog bindings [06/21] dt-bindings: arm: google: Add bindings for Google ARM platforms [07/21] dt-bindings: pinctrl: samsung: add google,gs101-pinctrl compatible [08/21] dt-bindings: pinctrl: samsung: add gs101-wakeup-eint compatible [09/21] dt-bindings: clock: gs101: Add cmu_top clock indices [10/21] dt-bindings: clock: gs101: Add cmu_apm clock indices [11/21] dt-bindings: clock: gs101: Add cmu_misc clock indices [12/21] clk: samsung: clk-pll: Add support for pll_{0516,0517,518} [13/21] clk: samsung: clk-gs101: Add cmu_top registers, plls, mux and gates [14/21] clk: samsung: clk-gs101: add CMU_APM support [15/21] clk: google: gs101: Add support for CMU_MISC clock unit [16/21] pinctrl: samsung: Add gs101 SoC pinctrl configuration [17/21] watchdog: s3c2410_wdt: Add support for Google tensor SoCs [18/21] arm64: dts: google: Add initial Google gs101 SoC support [19/21] google/gs101: Add dt overlay for oriole board [20/21] arm64: defconfig: Enable Google Tensor SoC [21/21] MAINTAINERS: add entry for Google Tensor SoC

[20/21] arm64: defconfig: Enable Google Tensor SoC

Commit Message

Patch