Message ID | 20230924183335.49961-2-krzysztof.kozlowski@linaro.org |
---|---|
State | Accepted |
Commit | 88fc274cb6c4bd643b0157db2602f685af57b846 |
Headers | show |
Series | [RESEND,1/2] ARM: dts: qcom: apq8064: drop label property from DSI | expand |
On Sun, 24 Sept 2023 at 21:33, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > Bindings expect clocks to be in different order: > > qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:0: 'iface' was expected > qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:1: 'core' was expected > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi index 311fd01a4f9e..6d1bf0eeb139 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi @@ -461,9 +461,9 @@ sdhc_1: mmc@8804000 { interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_SDCC1_AHB_CLK>; - clock-names = "core", "iface"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>; + clock-names = "iface", "core"; status = "disabled"; };