| Message ID | 20230923134904.3627402-13-vladimir.oltean@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add C72/C73 copper backplane support for LX2160 | expand |
On Tue, Oct 03, 2023 at 02:16:25PM +0100, Russell King (Oracle) wrote: > On Sat, Sep 23, 2023 at 04:49:01PM +0300, Vladimir Oltean wrote: > > Allow phylink_resolve_c73() to resolve backplane (KR) or SFP28 (CR) > > link speeds of 25Gbps. > > > > Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> > > Shouldn't this also be part of patch 5? Not really, no. Apart from adding the 25000baseKR_S_Full and 25000baseCR_S_Full link modes (which are indeed newly added in patch 5) to phylink_c73_priority_resolution[], it also adds the pre-existing 25000baseKR_Full and 25000baseCR_Full link modes. Without this, phylink fails to resolve the 25G backplane or SFP28 speeds, and it just reports "Link is up - unknown/unknown". The patch splitting may have been confusing. I had 2 options, either: (a) - create one patch which adds the missing pre-existing 25G backplane/ SFP28 modes to phylink_c73_priority_resolution[] - add the CR-S/KR-S link modes to phylink_c73_priority_resolution[] as part of the general CR-S/KR-S addition or (b) - first add the CR-S/KR-S link modes everywhere where phylink already uses 25GBase-KR/25GBase-CR - extend the phylink_c73_priority_resolution[] for all 4 link modes at the same time I opted for (b) but I can also go with (a) if you prefer it that way.
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 157984dd81de..484db2a5b62b 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -3382,6 +3382,10 @@ static struct { /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, + { ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, SPEED_25000 }, + { ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, SPEED_25000 }, + { ETHTOOL_LINK_MODE_25000baseKR_S_Full_BIT, SPEED_25000 }, + { ETHTOOL_LINK_MODE_25000baseCR_S_Full_BIT, SPEED_25000 }, { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, /* 5GBASE-KR not supported */
Allow phylink_resolve_c73() to resolve backplane (KR) or SFP28 (CR) link speeds of 25Gbps. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- v1->v2: patch is new drivers/net/phy/phylink.c | 4 ++++ 1 file changed, 4 insertions(+)