| Message ID | 20230922081026.2799-4-quic_tengfan@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | soc: qcom: Add uart console support for SM4450 | expand |
Hi Tengfei, kernel test robot noticed the following build errors: [auto build test ERROR on 940fcc189c51032dd0282cbee4497542c982ac59] url: https://github.com/intel-lab-lkp/linux/commits/Tengfei-Fan/dt-bindings-interrupt-controller-qcom-pdc-document-qcom-sm4450-pdc/20230922-161433 base: 940fcc189c51032dd0282cbee4497542c982ac59 patch link: https://lore.kernel.org/r/20230922081026.2799-4-quic_tengfan%40quicinc.com patch subject: [PATCH v4 3/6] arm64: dts: qcom: sm4450: Add RPMH and Global clock config: arm64-randconfig-002-20230924 (https://download.01.org/0day-ci/archive/20230924/202309242226.wwMJhznj-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 13.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230924/202309242226.wwMJhznj-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202309242226.wwMJhznj-lkp@intel.com/ All errors (new ones prefixed by >>): In file included from arch/arm64/boot/dts/qcom/sm4450-qrd.dts:8: >> arch/arm64/boot/dts/qcom/sm4450.dtsi:7:10: fatal error: dt-bindings/clock/qcom,sm4450-gcc.h: No such file or directory 7 | #include <dt-bindings/clock/qcom,sm4450-gcc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +7 arch/arm64/boot/dts/qcom/sm4450.dtsi > 7 #include <dt-bindings/clock/qcom,sm4450-gcc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 11
diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index 5e09880f4218..5a8a54b0f6c1 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> @@ -348,6 +350,20 @@ dma-ranges = <0 0 0 0 0x10 0>; compatible = "simple-bus"; + gcc: clock-controller@100000 { + compatible = "qcom,sm4450-gcc"; + reg = <0x0 0x00100000 0x0 0x1f4200>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, + <0>, + <0>, + <0>, + <0>; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -452,6 +468,13 @@ apps_bcm_voter: bcm-voter { compatible = "qcom,bcm-voter"; }; + + rpmhcc: clock-controller { + compatible = "qcom,sm4450-rpmh-clk"; + #clock-cells = <1>; + clocks = <&xo_board>; + clock-names = "xo"; + }; }; };