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[PULL,v2,00/39] tcg patch queue

Message ID 20230916171223.521545-1-richard.henderson@linaro.org
State New
Headers show

Pull-request

https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230915-2

Message

Richard Henderson Sept. 16, 2023, 5:12 p.m. UTC 
v2: tcg/loongarch64 patch set without last minute tweaks.

r~

The following changes since commit 005ad32358f12fe9313a4a01918a55e60d4f39e5:

  Merge tag 'pull-tpm-2023-09-12-3' of https://github.com/stefanberger/qemu-tpm into staging (2023-09-13 13:41:57 -0400)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230915-2

for you to fetch changes up to a97a83753c90d79ed15a716610af23fabd84aaed:

  tcg: Map code_gen_buffer with PROT_BTI (2023-09-16 14:57:16 +0000)

----------------------------------------------------------------
*: Delete checks for old host definitions
tcg/loongarch64: Generate LSX instructions
fpu: Add conversions between bfloat16 and [u]int8
fpu: Handle m68k extended precision denormals properly
accel/tcg: Improve cputlb i/o organization
accel/tcg: Simplify tlb_plugin_lookup
accel/tcg: Remove false-negative halted assertion
tcg: Add gvec compare with immediate and scalar operand
tcg/aarch64: Emit BTI insns at jump landing pads

----------------------------------------------------------------
Akihiko Odaki (3):
      util: Delete checks for old host definitions
      softmmu: Delete checks for old host definitions
      thunk: Delete checks for old host definitions

Jiajie Chen (16):
      tcg/loongarch64: Import LSX instructions
      tcg/loongarch64: Lower basic tcg vec ops to LSX
      tcg: pass vece to tcg_target_const_match()
      tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt
      tcg/loongarch64: Lower add/sub_vec to vadd/vsub
      tcg/loongarch64: Lower vector bitwise operations
      tcg/loongarch64: Lower neg_vec to vneg
      tcg/loongarch64: Lower mul_vec to vmul
      tcg/loongarch64: Lower vector min max ops
      tcg/loongarch64: Lower vector saturated ops
      tcg/loongarch64: Lower vector shift vector ops
      tcg/loongarch64: Lower bitsel_vec to vbitsel
      tcg/loongarch64: Lower vector shift integer ops
      tcg/loongarch64: Lower rotv_vec ops to LSX
      tcg/loongarch64: Lower rotli_vec to vrotri
      tcg/loongarch64: Implement 128-bit load & store

LIU Zhiwei (2):
      accel/tcg: Fix the comment for CPUTLBEntryFull
      fpu: Add conversions between bfloat16 and [u]int8

Nicholas Piggin (1):
      accel/tcg: mttcg remove false-negative halted assertion

Richard Henderson (17):
      tcg: Add gvec compare with immediate and scalar operand
      target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
      accel/tcg: Simplify tlb_plugin_lookup
      accel/tcg: Split out io_prepare and io_failed
      accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
      plugin: Simplify struct qemu_plugin_hwaddr
      accel/tcg: Merge cpu_transaction_failed into io_failed
      accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
      accel/tcg: Merge io_readx into do_ld_mmio_beN
      accel/tcg: Merge io_writex into do_st_mmio_leN
      accel/tcg: Introduce do_ld16_mmio_beN
      accel/tcg: Introduce do_st16_mmio_leN
      fpu: Handle m68k extended precision denormals properly
      tcg: Add tcg_out_tb_start backend hook
      util/cpuinfo-aarch64: Add CPUINFO_BTI
      tcg/aarch64: Emit BTI insns at jump landing pads
      tcg: Map code_gen_buffer with PROT_BTI

 accel/tcg/tcg-runtime.h              |   25 +
 host/include/aarch64/host/cpuinfo.h  |    1 +
 include/exec/cpu-defs.h              |   12 +-
 include/exec/user/thunk.h            |    3 +-
 include/fpu/softfloat.h              |   12 +
 include/hw/core/cpu.h                |   13 -
 include/qemu/plugin-memory.h         |   11 +-
 include/qemu/typedefs.h              |    1 -
 include/tcg/tcg-op-gvec-common.h     |    6 +
 tcg/loongarch64/tcg-target-con-set.h |    9 +
 tcg/loongarch64/tcg-target-con-str.h |    3 +
 tcg/loongarch64/tcg-target.h         |   40 +-
 tcg/loongarch64/tcg-target.opc.h     |   12 +
 accel/tcg/cputlb.c                   |  437 ++-
 accel/tcg/tcg-accel-ops-mttcg.c      |    9 +-
 accel/tcg/tcg-runtime-gvec.c         |   26 +
 fpu/softfloat.c                      |   67 +-
 plugins/api.c                        |   27 +-
 softmmu/async-teardown.c             |    3 -
 target/arm/tcg/translate.c           |   56 +-
 tcg/region.c                         |   41 +-
 tcg/tcg-op-gvec.c                    |  149 +
 tcg/tcg.c                            |    7 +-
 tests/tcg/m68k/denormal.c            |   53 +
 util/cpuinfo-aarch64.c               |    7 +
 util/oslib-posix.c                   |   15 +-
 fpu/softfloat-parts.c.inc            |    7 +-
 tcg/aarch64/tcg-target.c.inc         |   59 +-
 tcg/arm/tcg-target.c.inc             |    7 +-
 tcg/i386/tcg-target.c.inc            |    7 +-
 tcg/loongarch64/tcg-insn-defs.c.inc  | 6019 +++++++++++++++++++++++++++++++++-
 tcg/loongarch64/tcg-target.c.inc     |  624 +++-
 tcg/mips/tcg-target.c.inc            |    7 +-
 tcg/ppc/tcg-target.c.inc             |    7 +-
 tcg/riscv/tcg-target.c.inc           |    7 +-
 tcg/s390x/tcg-target.c.inc           |    7 +-
 tcg/sparc64/tcg-target.c.inc         |    7 +-
 tcg/tci/tcg-target.c.inc             |    7 +-
 tests/tcg/m68k/Makefile.target       |    2 +-
 39 files changed, 7419 insertions(+), 393 deletions(-)
 create mode 100644 tcg/loongarch64/tcg-target.opc.h
 create mode 100644 tests/tcg/m68k/denormal.c

Comments

Stefan Hajnoczi Sept. 19, 2023, 7:12 p.m. UTC | #1 
Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.