| Message ID | 20230908065847.28382-6-quic_tengfan@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | None | expand |
Hi Tengfei, kernel test robot noticed the following build errors: [auto build test ERROR on a47fc304d2b678db1a5d760a7d644dac9b067752] url: https://github.com/intel-lab-lkp/linux/commits/Tengfei-Fan/dt-bindings-firmware-document-Qualcomm-SM4450-SCM/20230908-150308 base: a47fc304d2b678db1a5d760a7d644dac9b067752 patch link: https://lore.kernel.org/r/20230908065847.28382-6-quic_tengfan%40quicinc.com patch subject: [PATCH 5/6] arm64: dts: qcom: sm4450: Add RPMH and Global clock controller config: arm64-randconfig-r024-20230908 (https://download.01.org/0day-ci/archive/20230908/202309082243.JImHPFSN-lkp@intel.com/config) compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20230908/202309082243.JImHPFSN-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202309082243.JImHPFSN-lkp@intel.com/ All errors (new ones prefixed by >>): In file included from arch/arm64/boot/dts/qcom/sm4450-qrd.dts:8: >> arch/arm64/boot/dts/qcom/sm4450.dtsi:7:10: fatal error: 'dt-bindings/clock/qcom,sm4450-gcc.h' file not found #include <dt-bindings/clock/qcom,sm4450-gcc.h> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. vim +7 arch/arm64/boot/dts/qcom/sm4450.dtsi > 7 #include <dt-bindings/clock/qcom,sm4450-gcc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 11
On 9/8/23 08:58, Tengfei Fan wrote: > From: Ajit Pandey <quic_ajipan@quicinc.com> > > Add device node for RPMH and Global clock controller on Qualcomm > SM4450 platform. > > Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> > Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sm4450.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi > index eb544d875806..2395b1d655a2 100644 > --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi > @@ -3,6 +3,8 @@ > * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. > */ > > +#include <dt-bindings/clock/qcom,rpmh.h> > +#include <dt-bindings/clock/qcom,sm4450-gcc.h> > #include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > @@ -367,6 +369,22 @@ > apps_bcm_voter: bcm-voter { > compatible = "qcom,bcm-voter"; > }; > + > + rpmhcc: clock-controller { > + compatible = "qcom,sm4450-rpmh-clk"; > + #clock-cells = <1>; > + clock-names = "xo"; > + clocks = <&xo_board>; property property-names please Konrad
在 9/20/2023 10:33 PM, Konrad Dybcio 写道: > > > On 9/8/23 08:58, Tengfei Fan wrote: >> From: Ajit Pandey <quic_ajipan@quicinc.com> >> >> Add device node for RPMH and Global clock controller on Qualcomm >> SM4450 platform. >> >> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sm4450.dtsi | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi >> b/arch/arm64/boot/dts/qcom/sm4450.dtsi >> index eb544d875806..2395b1d655a2 100644 >> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi >> @@ -3,6 +3,8 @@ >> * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights >> reserved. >> */ >> +#include <dt-bindings/clock/qcom,rpmh.h> >> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> >> #include <dt-bindings/gpio/gpio.h> >> #include <dt-bindings/interrupt-controller/arm-gic.h> >> #include <dt-bindings/soc/qcom,rpmh-rsc.h> >> @@ -367,6 +369,22 @@ >> apps_bcm_voter: bcm-voter { >> compatible = "qcom,bcm-voter"; >> }; >> + >> + rpmhcc: clock-controller { >> + compatible = "qcom,sm4450-rpmh-clk"; >> + #clock-cells = <1>; >> + clock-names = "xo"; >> + clocks = <&xo_board>; > property > property-names > > please > > Konrad Hi Konrad, I will adjust these nodes.
diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index eb544d875806..2395b1d655a2 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> @@ -367,6 +369,22 @@ apps_bcm_voter: bcm-voter { compatible = "qcom,bcm-voter"; }; + + rpmhcc: clock-controller { + compatible = "qcom,sm4450-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board>; + }; + }; + + gcc: clock-controller@100000 { + compatible = "qcom,sm4450-gcc"; + reg = <0x0 0x00100000 0x0 0x1f4200>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; }; tcsr_mutex: hwlock@1f40000 {