diff mbox

[PART2,v4,10/11] svm: Introduce AMD IOMMU avic_ga_log_notifier

Message ID 1468416032-7692-11-git-send-email-suravee.suthikulpanit@amd.com
State New
Headers show

Commit Message

Suthikulpanit, Suravee July 13, 2016, 1:20 p.m. UTC
From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>


This patch introduces avic_ga_log_notifier, which will be called
by IOMMU driver whenever it handles the Guest vAPIC (GA) log entry.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

---
 arch/x86/include/asm/kvm_host.h |  2 ++
 arch/x86/kvm/svm.c              | 68 +++++++++++++++++++++++++++++++++++++++--
 2 files changed, 68 insertions(+), 2 deletions(-)

-- 
1.9.1

Comments

Suthikulpanit, Suravee July 14, 2016, 9:43 a.m. UTC | #1
Hi Radim,

On 7/13/16 21:29, Radim Krčmář wrote:
> 2016-07-13 08:20-0500, Suravee Suthikulpanit:

>> >From: Suravee Suthikulpanit<Suravee.Suthikulpanit@amd.com>

>> >

>> >This patch introduces avic_ga_log_notifier, which will be called

>> >by IOMMU driver whenever it handles the Guest vAPIC (GA) log entry.

>> >

>> >Signed-off-by: Suravee Suthikulpanit<suravee.suthikulpanit@amd.com>

>> >---

>> >  arch/x86/include/asm/kvm_host.h |  2 ++

>> >  arch/x86/kvm/svm.c              | 68 +++++++++++++++++++++++++++++++++++++++--

>> >  2 files changed, 68 insertions(+), 2 deletions(-)

>> >

>> >diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h

>> >index 69e62862..a9466ad 100644

>> >--- a/arch/x86/include/asm/kvm_host.h

>> >+++ b/arch/x86/include/asm/kvm_host.h

>> >@@ -776,9 +776,11 @@ struct kvm_arch {

>> >  	bool disabled_lapic_found;

>> >

>> >  	/* Struct members for AVIC */

>> >+	u32 avic_vm_id;

>> >  	u32 ldr_mode;

>> >  	struct page *avic_logical_id_table_page;

>> >  	struct page *avic_physical_id_table_page;

>> >+	struct hlist_node hnode;

>> >  };

>> >

>> >  struct kvm_vm_stat {

>> >diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c

>> >index 16ef31b..1d9f2f6 100644

>> >--- a/arch/x86/kvm/svm.c

>> >+++ b/arch/x86/kvm/svm.c

>> >@@ -34,6 +34,8 @@

>> >  #include <linux/sched.h>

>> >  #include <linux/trace_events.h>

>> >  #include <linux/slab.h>

>> >+#include <linux/amd-iommu.h>

>> >+#include <linux/hashtable.h>

>> >

>> >  #include <asm/apic.h>

>> >  #include <asm/perf_event.h>

>> >@@ -928,6 +930,53 @@ static void svm_disable_lbrv(struct vcpu_svm *svm)

>> >  	set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);

>> >  }

>> >

>> >+/* Note:

>> >+ * This hash table is used to map VM_ID to a struct kvm_arch,

>> >+ * when handling AMD IOMMU GALOG notification to schedule in

>> >+ * a particular vCPU.

>> >+ */

>> >+#define SVM_VM_DATA_HASH_BITS	8

>> >+DECLARE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);

>> >+static spinlock_t svm_vm_data_hash_lock;

>> >+

>> >+/* Note:

>> >+ * This function is called from IOMMU driver to notify

>> >+ * SVM to schedule in a particular vCPU of a particular VM.

>> >+ */

>> >+static int avic_ga_log_notifier(int vm_id, int vcpu_id)

>> >+{

>> >+	unsigned long flags;

>> >+	struct kvm_arch *ka = NULL;

>> >+	struct kvm_vcpu *vcpu = NULL;

>> >+	struct vcpu_svm *svm = NULL;

>> >+

>> >+	pr_debug("SVM: %s: vm_id=%#x, vcpu_id=%#x\n", __func__, vm_id, vcpu_id);

>> >+

>> >+	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);

>> >+	hash_for_each_possible(svm_vm_data_hash, ka, hnode, vm_id) {

>> >+		struct kvm *kvm = container_of(ka, struct kvm, arch);

>> >+

>> >+		vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);

> The first result is not neccessarily the correct one.

>

> With more than active 256 VMs, there is a guaranteed collision that

> cannot be disambiguated, so VCPUs in both VMs need to be woken up.

>

> Having a 24 bit vm_id and checking that

>    kvm->*.avic_id & 0xfffff == vm_id

> would help a bit to avoid useless wakeups, but the collision cannot be

> avoided.


True. What if SVM guarantee that the VM_ID won't conflict b/w any two 
active VMs?

Thanks
Suravee.
diff mbox

Patch

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 69e62862..a9466ad 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -776,9 +776,11 @@  struct kvm_arch {
 	bool disabled_lapic_found;
 
 	/* Struct members for AVIC */
+	u32 avic_vm_id;
 	u32 ldr_mode;
 	struct page *avic_logical_id_table_page;
 	struct page *avic_physical_id_table_page;
+	struct hlist_node hnode;
 };
 
 struct kvm_vm_stat {
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 16ef31b..1d9f2f6 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -34,6 +34,8 @@ 
 #include <linux/sched.h>
 #include <linux/trace_events.h>
 #include <linux/slab.h>
+#include <linux/amd-iommu.h>
+#include <linux/hashtable.h>
 
 #include <asm/apic.h>
 #include <asm/perf_event.h>
@@ -928,6 +930,53 @@  static void svm_disable_lbrv(struct vcpu_svm *svm)
 	set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);
 }
 
+/* Note:
+ * This hash table is used to map VM_ID to a struct kvm_arch,
+ * when handling AMD IOMMU GALOG notification to schedule in
+ * a particular vCPU.
+ */
+#define SVM_VM_DATA_HASH_BITS	8
+DECLARE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);
+static spinlock_t svm_vm_data_hash_lock;
+
+/* Note:
+ * This function is called from IOMMU driver to notify
+ * SVM to schedule in a particular vCPU of a particular VM.
+ */
+static int avic_ga_log_notifier(int vm_id, int vcpu_id)
+{
+	unsigned long flags;
+	struct kvm_arch *ka = NULL;
+	struct kvm_vcpu *vcpu = NULL;
+	struct vcpu_svm *svm = NULL;
+
+	pr_debug("SVM: %s: vm_id=%#x, vcpu_id=%#x\n", __func__, vm_id, vcpu_id);
+
+	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
+	hash_for_each_possible(svm_vm_data_hash, ka, hnode, vm_id) {
+		struct kvm *kvm = container_of(ka, struct kvm, arch);
+
+		vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);
+		break;
+	}
+	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
+
+	if (!vcpu)
+		return 0;
+
+	svm = to_svm(vcpu);
+
+	/* Note:
+	 * At this point, the IOMMU should have already set the pending
+	 * bit in the vAPIC backing page. So, we just need to schedule
+	 * in the vcpu.
+	 */
+	if (vcpu->mode == OUTSIDE_GUEST_MODE)
+		kvm_vcpu_wake_up(vcpu);
+
+	return 0;
+}
+
 static __init int svm_hardware_setup(void)
 {
 	int cpu;
@@ -986,10 +1035,15 @@  static __init int svm_hardware_setup(void)
 	if (avic) {
 		if (!npt_enabled ||
 		    !boot_cpu_has(X86_FEATURE_AVIC) ||
-		    !IS_ENABLED(CONFIG_X86_LOCAL_APIC))
+		    !IS_ENABLED(CONFIG_X86_LOCAL_APIC)) {
 			avic = false;
-		else
+		} else {
 			pr_info("AVIC enabled\n");
+
+			hash_init(svm_vm_data_hash);
+			spin_lock_init(&svm_vm_data_hash_lock);
+			amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);
+		}
 	}
 
 	return 0;
@@ -1282,16 +1336,22 @@  static int avic_init_backing_page(struct kvm_vcpu *vcpu)
 
 static void avic_vm_destroy(struct kvm *kvm)
 {
+	unsigned long flags;
 	struct kvm_arch *vm_data = &kvm->arch;
 
 	if (vm_data->avic_logical_id_table_page)
 		__free_page(vm_data->avic_logical_id_table_page);
 	if (vm_data->avic_physical_id_table_page)
 		__free_page(vm_data->avic_physical_id_table_page);
+
+	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
+	hash_del(&vm_data->hnode);
+	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
 }
 
 static int avic_vm_init(struct kvm *kvm)
 {
+	unsigned long flags;
 	int err = -ENOMEM;
 	struct kvm_arch *vm_data = &kvm->arch;
 	struct page *p_page;
@@ -1316,6 +1376,10 @@  static int avic_vm_init(struct kvm *kvm)
 	vm_data->avic_logical_id_table_page = l_page;
 	clear_page(page_address(l_page));
 
+	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
+	hash_add(svm_vm_data_hash, &vm_data->hnode, vm_data->avic_vm_id);
+	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
+
 	return 0;
 
 free_avic: