| Message ID | 20230829020511.26844-1-hal.feng@starfivetech.com |
|---|---|
| State | Accepted |
| Commit | 2f9f488e7b1448f8e9732b12df9ffbf7d42ef304 |
| Headers | show |
| Series | [-next,v2,1/2] riscv: dts: starfive: visionfive 2: Enable usb0 | expand |
From: Conor Dooley <conor.dooley@microchip.com> On Tue, 29 Aug 2023 10:05:10 +0800, Hal Feng wrote: > usb0 was disabled by mistake when merging, so enable it. > > Applied to riscv-dt-fixes, thanks! [1/2] riscv: dts: starfive: visionfive 2: Enable usb0 https://git.kernel.org/conor/c/2f9f488e7b14 [2/2] riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order https://git.kernel.org/conor/c/1558209533f1 I'll try to get these out before the weekend, the other pending patch has been sitting since mid merge window. Thanks, Conor.
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index d79f94432b27..85f40df93f25 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -513,6 +513,7 @@ &uart0 { &usb0 { dr_mode = "peripheral"; + status = "okay"; }; &U74_1 {
usb0 was disabled by mistake when merging, so enable it. Fixes: e7c304c0346d ("riscv: dts: starfive: jh7110: add the node and pins configuration for tdm") Signed-off-by: Hal Feng <hal.feng@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 + 1 file changed, 1 insertion(+)