@@ -45,7 +45,6 @@ void gen_lookup_tb(DisasContext *s);
long vfp_reg_offset(bool dp, unsigned reg);
long neon_full_reg_offset(unsigned reg);
long neon_element_offset(int reg, int element, MemOp memop);
-void gen_rev16(TCGv_i32 dest, TCGv_i32 var);
void clear_eci_state(DisasContext *s);
bool mve_eci_check(DisasContext *s);
void mve_update_eci(DisasContext *s);
@@ -3528,7 +3528,7 @@ static bool trans_VREV16(DisasContext *s, arg_2misc *a)
if (a->size != 0) {
return false;
}
- return do_2misc(s, a, gen_rev16);
+ return do_2misc(s, a, tcg_gen_hrev32_i32);
}
static bool trans_VCLS(DisasContext *s, arg_2misc *a)
@@ -416,18 +416,6 @@ static void gen_smul_dual(TCGv_i32 a, TCGv_i32 b)
tcg_gen_mov_i32(a, tmp1);
}
-/* Byteswap each halfword. */
-void gen_rev16(TCGv_i32 dest, TCGv_i32 var)
-{
- TCGv_i32 tmp = tcg_temp_new_i32();
- TCGv_i32 mask = tcg_constant_i32(0x00ff00ff);
- tcg_gen_shri_i32(tmp, var, 8);
- tcg_gen_and_i32(tmp, tmp, mask);
- tcg_gen_and_i32(var, var, mask);
- tcg_gen_shli_i32(var, var, 8);
- tcg_gen_or_i32(dest, var, tmp);
-}
-
/* Byteswap low halfword and sign extend. */
static void gen_revsh(TCGv_i32 dest, TCGv_i32 var)
{
@@ -7578,7 +7566,7 @@ static bool trans_REV16(DisasContext *s, arg_rr *a)
if (!ENABLE_ARCH_6) {
return false;
}
- return op_rr(s, a, gen_rev16);
+ return op_rr(s, a, tcg_gen_hrev32_i32);
}
static bool trans_REVSH(DisasContext *s, arg_rr *a)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/tcg/translate-a32.h | 1 - target/arm/tcg/translate-neon.c | 2 +- target/arm/tcg/translate.c | 14 +------------- 3 files changed, 2 insertions(+), 15 deletions(-)