diff mbox series

[04/12] target/rx: Use generic hrev32_i32() in REVW opcode

Message ID 20230822124042.54739-5-philmd@linaro.org
State New
Headers show
Series tcg: Factor hrev{32,64}_{i32,i64,tl} out | expand

Commit Message

Philippe Mathieu-Daudé Aug. 22, 2023, 12:40 p.m. UTC 
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/rx/translate.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/target/rx/translate.c b/target/rx/translate.c
index f552a0319a..75590ae05e 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -1513,13 +1513,7 @@  static bool trans_REVL(DisasContext *ctx, arg_REVL *a)
 /* revw rs, rd */
 static bool trans_REVW(DisasContext *ctx, arg_REVW *a)
 {
-    TCGv tmp;
-    tmp = tcg_temp_new();
-    tcg_gen_andi_i32(tmp, cpu_regs[a->rs], 0x00ff00ff);
-    tcg_gen_shli_i32(tmp, tmp, 8);
-    tcg_gen_shri_i32(cpu_regs[a->rd], cpu_regs[a->rs], 8);
-    tcg_gen_andi_i32(cpu_regs[a->rd], cpu_regs[a->rd], 0x00ff00ff);
-    tcg_gen_or_i32(cpu_regs[a->rd], cpu_regs[a->rd], tmp);
+    tcg_gen_hrev32_i32(cpu_regs[a->rd], cpu_regs[a->rs]);
     return true;
 }