diff mbox series

[V2,2/2] arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock

Message ID 20230815231117.15169-2-aford173@gmail.com
State Accepted
Commit 161af16c18f3e10d81870328928e5fff3a7d47bb
Headers show
Series None | expand

Commit Message

Adam Ford Aug. 15, 2023, 11:11 p.m. UTC
A previous patch removed the audio PLL configuration from the clk
node, which resulted in an incorrect clock rate when attempting
to playback audio.  Fix this by setting the AUDIO_PLL2 rate inside
the SAI3 node since it's the SAI3 that needs it.

Fixes: 16c984524862 ("arm64: dts: imx8mp: don't initialize audio clocks from CCM node")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
V2:  No change
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
index 06e91297fb16..acd265d8b58e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
@@ -381,9 +381,10 @@  &pcie_phy {
 &sai3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_sai3>;
-	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
+	assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
+			  <&clk IMX8MP_AUDIO_PLL2> ;
 	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
-	assigned-clock-rates = <12288000>;
+	assigned-clock-rates = <12288000>, <361267200>;
 	fsl,sai-mclk-direction-output;
 	status = "okay";
 };