Message ID | 1689060470-88947-1-git-send-email-Sanju.Mehta@amd.com |
---|---|
State | Superseded |
Headers | show
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Tue, 11 Jul 2023 07:28:34 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT047.mail.protection.outlook.com (10.13.174.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6588.20 via Frontend Transport; Tue, 11 Jul 2023 07:28:33 +0000 Received: from sanjuamdntb2.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 11 Jul 2023 02:28:30 -0500 From: Sanjay R Mehta <Sanju.Mehta@amd.com> To: <mika.westerberg@linux.intel.com>, <andreas.noever@gmail.com>, <michael.jamet@intel.com>, <YehezkelShB@gmail.com> CC: <linux-usb@vger.kernel.org>, Sanjay R Mehta <sanju.mehta@amd.com>, "Sanath S" <Sanath.S@amd.com> Subject: [PATCH] thunderbolt: Fix Thunderbolt 3 display flickering issue on 2nd hot plug onwards Date: Tue, 11 Jul 2023 02:27:50 -0500 Message-ID: <1689060470-88947-1-git-send-email-Sanju.Mehta@amd.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain; 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Series |
thunderbolt: Fix Thunderbolt 3 display flickering issue on 2nd hot plug onwards
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expand
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diff --git a/drivers/thunderbolt/tmu.c b/drivers/thunderbolt/tmu.c index 626aca3..49146f9 100644 --- a/drivers/thunderbolt/tmu.c +++ b/drivers/thunderbolt/tmu.c @@ -415,7 +415,9 @@ int tb_switch_tmu_disable(struct tb_switch *sw) * uni-directional mode and we don't want to change it's TMU * mode. */ - tb_switch_tmu_rate_write(sw, TB_SWITCH_TMU_RATE_OFF); + ret = tb_switch_tmu_rate_write(sw, TB_SWITCH_TMU_RATE_OFF); + if (ret) + return ret; tb_port_tmu_time_sync_disable(up); ret = tb_port_tmu_time_sync_disable(down);