| Message ID | 1689247213-13569-3-git-send-email-quic_krichai@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: qcom: ep: Add basic interconnect support | expand |
On 13.07.2023 13:20, Krishna chaitanya chundru wrote: > Add pcie-mem interconnect path to sdx65 platform. > > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> > --- No CPU - SLAVE_PCIE_0? Konrad > arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi > index 1a35830..77fa97c 100644 > --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi > @@ -332,6 +332,9 @@ > <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "global", "doorbell"; > > + interconnects = <&system_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>; > + interconnect-names = "pcie-mem"; > + > resets = <&gcc GCC_PCIE_BCR>; > reset-names = "core"; >
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi index 1a35830..77fa97c 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi @@ -332,6 +332,9 @@ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "global", "doorbell"; + interconnects = <&system_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie-mem"; + resets = <&gcc GCC_PCIE_BCR>; reset-names = "core";