Message ID | 20230704145012.49870-9-philmd@linaro.org |
---|---|
State | New |
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Tue, 04 Jul 2023 07:50:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> To: qemu-devel@nongnu.org Cc: Thomas Huth <thuth@redhat.com>, qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Sergey Kambalin <serg.oker@gmail.com>, =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= <philmd@linaro.org> Subject: [PATCH v2 08/19] hw/timer/arm_timer: Extract arm_timer_reset_hold() Date: Tue, 4 Jul 2023 16:50:01 +0200 Message-Id: <20230704145012.49870-9-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230704145012.49870-1-philmd@linaro.org> References: <20230704145012.49870-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org |
Series |
hw/timer/arm_timer: QOM'ify ARM_TIMER and correct sysbus/irq in ICP_PIT
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On 7/4/23 16:50, Philippe Mathieu-Daudé wrote: > Extract arm_timer_reset_hold() before converting this model to > QOM/QDev in few commits. This will become our ResettableHoldPhase > handler. > > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > hw/timer/arm_timer.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 8dae845998..0d7fac4d78 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -172,13 +172,20 @@ static const VMStateDescription vmstate_arm_timer = { } }; +static void arm_timer_reset_hold(ArmTimer *s) +{ + s->limit = 0; + s->int_level = 0; + s->control = TIMER_CTRL_IE; +} + static ArmTimer *arm_timer_init(uint32_t freq) { ArmTimer *s; s = g_new0(ArmTimer, 1); s->freq = freq; - s->control = TIMER_CTRL_IE; + arm_timer_reset_hold(s); s->timer = ptimer_init(arm_timer_tick, s, PTIMER_POLICY_LEGACY); vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_arm_timer, s);
Extract arm_timer_reset_hold() before converting this model to QOM/QDev in few commits. This will become our ResettableHoldPhase handler. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/timer/arm_timer.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)