Message ID | 20230627-topic-more_bindings-v1-7-6b4b6cd081e5@linaro.org |
---|---|
State | New |
Headers | show |
Series | Even more msm bindings fixes | expand |
On Tue, 27 Jun 2023 18:24:23 +0200, Konrad Dybcio wrote: > Some IOMMUs on some platforms (there doesn't seem to be a good denominator > for this) require the presence of a third clock, specifically for > accessing the IOMMU's Translation Buffer Unit (TBU). Allow it. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > Documentation/devicetree/bindings/iommu/qcom,iommu.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml index d9fabdf930d9..3b7acb459f8e 100644 --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml @@ -24,14 +24,18 @@ properties: - const: qcom,msm-iommu-v1 clocks: + minItems: 2 items: - description: Clock required for IOMMU register group access - description: Clock required for underlying bus access + - description: Clock required for Translation Buffer Unit access clock-names: + minItems: 2 items: - const: iface - const: bus + - const: tbu power-domains: maxItems: 1
Some IOMMUs on some platforms (there doesn't seem to be a good denominator for this) require the presence of a third clock, specifically for accessing the IOMMU's Translation Buffer Unit (TBU). Allow it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- Documentation/devicetree/bindings/iommu/qcom,iommu.yaml | 4 ++++ 1 file changed, 4 insertions(+)