Message ID | 20230620-topic-sc8280_gccgdsc-v2-2-562c1428c10d@linaro.org |
---|---|
State | Accepted |
Commit | 9eba4db02a88e7a810aabd70f7a6960f184f391f |
Headers | show |
Series | Fix up 8280 GCC GDSCs | expand |
On Mon, Jun 26, 2023 at 07:48:07PM +0200, Konrad Dybcio wrote: > There are 10 more GDSCs that we've not been caring about, and by extension > (and perhaps even more importantly), not putting to sleep. Add them. > > Fixes: a66a82f2a55e ("dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings") > Acked-by: Rob Herring <robh@kernel.org> > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h > index 721105ea4fad..845491591784 100644 > --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h > +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h > @@ -494,5 +494,15 @@ > #define USB30_SEC_GDSC 11 > #define EMAC_0_GDSC 12 > #define EMAC_1_GDSC 13 > +#define USB4_1_GDSC 14 > +#define USB4_GDSC 15 > +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 16 > +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 17 > +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 18 > +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 19 > +#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 20 > +#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 21 > +#define HLOS1_VOTE_TURING_MMU_TBU2_GDSC 22 > +#define HLOS1_VOTE_TURING_MMU_TBU3_GDSC 23 > > #endif > > -- > 2.41.0 >
diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h index 721105ea4fad..845491591784 100644 --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h @@ -494,5 +494,15 @@ #define USB30_SEC_GDSC 11 #define EMAC_0_GDSC 12 #define EMAC_1_GDSC 13 +#define USB4_1_GDSC 14 +#define USB4_GDSC 15 +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 16 +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 17 +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 18 +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 19 +#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 20 +#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 21 +#define HLOS1_VOTE_TURING_MMU_TBU2_GDSC 22 +#define HLOS1_VOTE_TURING_MMU_TBU3_GDSC 23 #endif