diff mbox series

[v4,1/6] dt-bindings: nvmem: sec-qfprom: Add bindings for secure qfprom

Message ID 20230623141806.13388-2-quic_kbajaj@quicinc.com
State New
Headers show
Series soc: qcom: llcc: Add support for QDU1000/QRU1000 | expand

Commit Message

Komal Bajaj June 23, 2023, 2:18 p.m. UTC
This patch adds bindings for secure qfprom found in QCOM SOCs.
SECURE QFPROM driver is based on simple nvmem framework.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 .../bindings/nvmem/qcom,sec-qfprom.yaml       | 58 +++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml

Comments

Komal Bajaj June 26, 2023, 8:22 a.m. UTC | #1
On 6/23/2023 10:06 PM, Krzysztof Kozlowski wrote:
> On 23/06/2023 16:18, Komal Bajaj wrote:
>> This patch adds bindings for secure qfprom found in QCOM SOCs.
>> SECURE QFPROM driver is based on simple nvmem framework.
>>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>> ---
>>   .../bindings/nvmem/qcom,sec-qfprom.yaml       | 58 +++++++++++++++++++
>>   1 file changed, 58 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml
>> new file mode 100644
>> index 000000000000..675e27918c7b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml
>> @@ -0,0 +1,58 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/nvmem/qcom,sec-qfprom.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Technologies Inc, SECURE QFPROM Efuse
> SECURE is not acronym, so "Secure".

Noted.

>
>> +
>> +maintainers:
>> +  - Komal Bajaj <quic_kbajaj@quicinc.com>
> Add description: with explanation what is this.  Specifically it should
> be quite clear what is here different than regular QFPROM

Sure, will add description the next patch set.

>
>> +
>> +allOf:
>> +  - $ref: nvmem.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +          - qcom,qdu1000-sec-qfprom
>> +      - const: qcom,sec-qfprom
>> +
>> +  reg:
>> +    items:
>> +      - description: The secure qfprom corrected region.
>> +
>> +  # Needed if any child nodes are present.
>> +  "#address-cells":
>> +    const: 1
>> +  "#size-cells":
>> +    const: 1
> Drop both, they are not needed.

I didn't get it. Can you please explain why these are not needed as this
node will have child nodes which will use single value for address and size.

>
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
>> +
>> +    soc {
>> +      #address-cells = <2>;
>> +      #size-cells = <2>;
>> +
>> +      efuse@221c8000 {
>> +        compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom";
>> +        reg = <0 0x221c8000 0 0x1000>;
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +
>> +        multi_chan_ddr: multi_chan_ddr@12b {
> No underscores in node names.

Noted.

>
>
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski June 26, 2023, 9:46 a.m. UTC | #2
On 26/06/2023 11:02, Komal Bajaj wrote:
> 
> 
> On 6/26/2023 2:00 PM, Krzysztof Kozlowski wrote:
>> On 26/06/2023 10:22, Komal Bajaj wrote:
>>>>> +
>>>>> +allOf:
>>>>> +  - $ref: nvmem.yaml#
>>>>> +
>>>>> +properties:
>>>>> +  compatible:
>>>>> +    items:
>>>>> +      - enum:
>>>>> +          - qcom,qdu1000-sec-qfprom
>>>>> +      - const: qcom,sec-qfprom
>>>>> +
>>>>> +  reg:
>>>>> +    items:
>>>>> +      - description: The secure qfprom corrected region.
>>>>> +
>>>>> +  # Needed if any child nodes are present.
>>>>> +  "#address-cells":
>>>>> +    const: 1
>>>>> +  "#size-cells":
>>>>> +    const: 1
>>>> Drop both, they are not needed.
>>> I didn't get it. Can you please explain why these are not needed as this
>>> node will have child nodes which will use single value for address and size.
>> I suspect they are already defined. Do other bindings (for cases with
>> children) have them? If not, why here it would be different?
> 
> Yes, I see there are bindings that has these properties, listed a few of 
> them below -
> 
> [1] 
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml

Please work on current development. It's a bit of waste of time to
review old code...

https://lore.kernel.org/all/20230611140330.154222-16-srinivas.kandagatla@linaro.org/

> [2] 
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/firmware/arm,scmi.yaml

That's not a nvmem provider.

> [3] 
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml

That's not a nvmem provider.


Best regards,
Krzysztof
Komal Bajaj June 26, 2023, 10:08 a.m. UTC | #3
On 6/26/2023 3:16 PM, Krzysztof Kozlowski wrote:
> On 26/06/2023 11:02, Komal Bajaj wrote:
>>
>> On 6/26/2023 2:00 PM, Krzysztof Kozlowski wrote:
>>> On 26/06/2023 10:22, Komal Bajaj wrote:
>>>>>> +
>>>>>> +allOf:
>>>>>> +  - $ref: nvmem.yaml#
>>>>>> +
>>>>>> +properties:
>>>>>> +  compatible:
>>>>>> +    items:
>>>>>> +      - enum:
>>>>>> +          - qcom,qdu1000-sec-qfprom
>>>>>> +      - const: qcom,sec-qfprom
>>>>>> +
>>>>>> +  reg:
>>>>>> +    items:
>>>>>> +      - description: The secure qfprom corrected region.
>>>>>> +
>>>>>> +  # Needed if any child nodes are present.
>>>>>> +  "#address-cells":
>>>>>> +    const: 1
>>>>>> +  "#size-cells":
>>>>>> +    const: 1
>>>>> Drop both, they are not needed.
>>>> I didn't get it. Can you please explain why these are not needed as this
>>>> node will have child nodes which will use single value for address and size.
>>> I suspect they are already defined. Do other bindings (for cases with
>>> children) have them? If not, why here it would be different?
>> Yes, I see there are bindings that has these properties, listed a few of
>> them below -
>>
>> [1]
>> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
> Please work on current development. It's a bit of waste of time to
> review old code...

Okay sorry for that, will work on this.

Thanks
Komal
>
> https://lore.kernel.org/all/20230611140330.154222-16-srinivas.kandagatla@linaro.org/
>
>> [2]
>> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
> That's not a nvmem provider.
>
>> [3]
>> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
> That's not a nvmem provider.
>
>
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml
new file mode 100644
index 000000000000..675e27918c7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml
@@ -0,0 +1,58 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/qcom,sec-qfprom.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies Inc, SECURE QFPROM Efuse
+
+maintainers:
+  - Komal Bajaj <quic_kbajaj@quicinc.com>
+
+allOf:
+  - $ref: nvmem.yaml#
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,qdu1000-sec-qfprom
+      - const: qcom,sec-qfprom
+
+  reg:
+    items:
+      - description: The secure qfprom corrected region.
+
+  # Needed if any child nodes are present.
+  "#address-cells":
+    const: 1
+  "#size-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
+
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      efuse@221c8000 {
+        compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom";
+        reg = <0 0x221c8000 0 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        multi_chan_ddr: multi_chan_ddr@12b {
+          reg = <0x12b 0x1>;
+          bits = <0 2>;
+        };
+      };
+    };
+