| Message ID | 20230623172556.1951974-1-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/nios2 : Explicitly ask for target-endian loads and stores | expand |
On 23/6/23 19:25, Peter Maydell wrote: > When we generate code for guest loads and stores, at the moment they > end up being requests for a host-endian access. So for target-system-nios2 > (little endian) a load like > ldw r3,0(r4) > results on an x86 host in the TCG IR > qemu_ld_a32_i32 r3,loc2,al+leul,0 > but on s390 it is > qemu_ld_a32_i32 r3,loc2,al+beul,0 > > The result is that guests don't work on big-endian hosts. > > Use the MO_TE* memops rather than the plain ones. > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1693 > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > Presumably this got lost in a recent conversion somewhere, > but I can't figure out where, so maybe it's been broken much > longer... > --- > target/nios2/translate.c | 20 ++++++++++---------- > 1 file changed, 10 insertions(+), 10 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 6/23/23 19:25, Peter Maydell wrote: > When we generate code for guest loads and stores, at the moment they > end up being requests for a host-endian access. So for target-system-nios2 > (little endian) a load like > ldw r3,0(r4) > results on an x86 host in the TCG IR > qemu_ld_a32_i32 r3,loc2,al+leul,0 > but on s390 it is > qemu_ld_a32_i32 r3,loc2,al+beul,0 > > The result is that guests don't work on big-endian hosts. > > Use the MO_TE* memops rather than the plain ones. > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1693 > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > Presumably this got lost in a recent conversion somewhere, > but I can't figure out where, so maybe it's been broken much > longer... It has been broken since initial commit: 032c76bc6f9 was already wrong. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 6/23/23 19:25, Peter Maydell wrote: > When we generate code for guest loads and stores, at the moment they > end up being requests for a host-endian access. So for target-system-nios2 > (little endian) a load like > ldw r3,0(r4) > results on an x86 host in the TCG IR > qemu_ld_a32_i32 r3,loc2,al+leul,0 > but on s390 it is > qemu_ld_a32_i32 r3,loc2,al+beul,0 > > The result is that guests don't work on big-endian hosts. > > Use the MO_TE* memops rather than the plain ones. > > Resolves:https://gitlab.com/qemu-project/qemu/-/issues/1693 > Signed-off-by: Peter Maydell<peter.maydell@linaro.org> > --- > Presumably this got lost in a recent conversion somewhere, > but I can't figure out where, so maybe it's been broken much > longer... > --- > target/nios2/translate.c | 20 ++++++++++---------- > 1 file changed, 10 insertions(+), 10 deletions(-) Queued to tcg-next, for lack of anything better. r~
diff --git a/target/nios2/translate.c b/target/nios2/translate.c index a365ad8293b..4264c7ec6b4 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -436,19 +436,19 @@ static const Nios2Instruction i_type_instructions[] = { INSTRUCTION_FLG(gen_cmpxxsi, TCG_COND_GE), /* cmpgei */ INSTRUCTION_ILLEGAL(), INSTRUCTION_ILLEGAL(), - INSTRUCTION_FLG(gen_ldx, MO_UW), /* ldhu */ + INSTRUCTION_FLG(gen_ldx, MO_TEUW), /* ldhu */ INSTRUCTION(andi), /* andi */ - INSTRUCTION_FLG(gen_stx, MO_UW), /* sth */ + INSTRUCTION_FLG(gen_stx, MO_TEUW), /* sth */ INSTRUCTION_FLG(gen_bxx, TCG_COND_GE), /* bge */ - INSTRUCTION_FLG(gen_ldx, MO_SW), /* ldh */ + INSTRUCTION_FLG(gen_ldx, MO_TESW), /* ldh */ INSTRUCTION_FLG(gen_cmpxxsi, TCG_COND_LT), /* cmplti */ INSTRUCTION_ILLEGAL(), INSTRUCTION_ILLEGAL(), INSTRUCTION_NOP(), /* initda */ INSTRUCTION(ori), /* ori */ - INSTRUCTION_FLG(gen_stx, MO_UL), /* stw */ + INSTRUCTION_FLG(gen_stx, MO_TEUL), /* stw */ INSTRUCTION_FLG(gen_bxx, TCG_COND_LT), /* blt */ - INSTRUCTION_FLG(gen_ldx, MO_UL), /* ldw */ + INSTRUCTION_FLG(gen_ldx, MO_TEUL), /* ldw */ INSTRUCTION_FLG(gen_cmpxxsi, TCG_COND_NE), /* cmpnei */ INSTRUCTION_ILLEGAL(), INSTRUCTION_ILLEGAL(), @@ -468,19 +468,19 @@ static const Nios2Instruction i_type_instructions[] = { INSTRUCTION_FLG(gen_cmpxxui, TCG_COND_GEU), /* cmpgeui */ INSTRUCTION_ILLEGAL(), INSTRUCTION_ILLEGAL(), - INSTRUCTION_FLG(gen_ldx, MO_UW), /* ldhuio */ + INSTRUCTION_FLG(gen_ldx, MO_TEUW), /* ldhuio */ INSTRUCTION(andhi), /* andhi */ - INSTRUCTION_FLG(gen_stx, MO_UW), /* sthio */ + INSTRUCTION_FLG(gen_stx, MO_TEUW), /* sthio */ INSTRUCTION_FLG(gen_bxx, TCG_COND_GEU), /* bgeu */ - INSTRUCTION_FLG(gen_ldx, MO_SW), /* ldhio */ + INSTRUCTION_FLG(gen_ldx, MO_TESW), /* ldhio */ INSTRUCTION_FLG(gen_cmpxxui, TCG_COND_LTU), /* cmpltui */ INSTRUCTION_ILLEGAL(), INSTRUCTION_UNIMPLEMENTED(), /* custom */ INSTRUCTION_NOP(), /* initd */ INSTRUCTION(orhi), /* orhi */ - INSTRUCTION_FLG(gen_stx, MO_SL), /* stwio */ + INSTRUCTION_FLG(gen_stx, MO_TESL), /* stwio */ INSTRUCTION_FLG(gen_bxx, TCG_COND_LTU), /* bltu */ - INSTRUCTION_FLG(gen_ldx, MO_UL), /* ldwio */ + INSTRUCTION_FLG(gen_ldx, MO_TEUL), /* ldwio */ INSTRUCTION(rdprs), /* rdprs */ INSTRUCTION_ILLEGAL(), INSTRUCTION_FLG(handle_r_type_instr, 0), /* R-Type */
When we generate code for guest loads and stores, at the moment they end up being requests for a host-endian access. So for target-system-nios2 (little endian) a load like ldw r3,0(r4) results on an x86 host in the TCG IR qemu_ld_a32_i32 r3,loc2,al+leul,0 but on s390 it is qemu_ld_a32_i32 r3,loc2,al+beul,0 The result is that guests don't work on big-endian hosts. Use the MO_TE* memops rather than the plain ones. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1693 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- Presumably this got lost in a recent conversion somewhere, but I can't figure out where, so maybe it's been broken much longer... --- target/nios2/translate.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)