| Message ID | 20230622-topic-8998clk-v1-5-5b7a0d6e98b1@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | MSM8998 clk cleanups and fixups | expand |
On 6/22/2023 5:57 AM, Konrad Dybcio wrote: > GPUCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. > Add .name lookup to make sure older DTs consume the correct clock. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
diff --git a/drivers/clk/qcom/gpucc-msm8998.c b/drivers/clk/qcom/gpucc-msm8998.c index f929e0f2333f..cc0b43354787 100644 --- a/drivers/clk/qcom/gpucc-msm8998.c +++ b/drivers/clk/qcom/gpucc-msm8998.c @@ -98,7 +98,7 @@ static const struct parent_map gpu_xo_gpll0_map[] = { static const struct clk_parent_data gpu_xo_gpll0[] = { { .hw = &gpucc_cxo_clk.clkr.hw }, - { .fw_name = "gpll0" }, + { .fw_name = "gpll0", .name = "gcc_gpu_gpll0_clk" }, }; static const struct parent_map gpu_xo_gpupll0_map[] = {
GPUCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. Add .name lookup to make sure older DTs consume the correct clock. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/clk/qcom/gpucc-msm8998.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)