diff mbox series

[1/2] dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs

Message ID 20230616104941.921555-2-quic_imrashai@quicinc.com
State Superseded
Headers show
Series [1/2] dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs | expand

Commit Message

Imran Shaik June 16, 2023, 10:49 a.m. UTC
Update the qcom GCC clock bindings and add v2 compatible string for QDU1000
and QRU1000 SoCs.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
---
 .../devicetree/bindings/clock/qcom,qdu1000-gcc.yaml         | 6 +++++-
 include/dt-bindings/clock/qcom,qdu1000-gcc.h                | 4 +++-
 2 files changed, 8 insertions(+), 2 deletions(-)

Comments

Krzysztof Kozlowski June 22, 2023, 1:45 p.m. UTC | #1
On 16/06/2023 13:33, Krzysztof Kozlowski wrote:
> On 16/06/2023 12:49, Imran Shaik wrote:
>> Update the qcom GCC clock bindings and add v2 compatible string for QDU1000
>> and QRU1000 SoCs.
>>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
>> ---
>>  .../devicetree/bindings/clock/qcom,qdu1000-gcc.yaml         | 6 +++++-
>>  include/dt-bindings/clock/qcom,qdu1000-gcc.h                | 4 +++-
>>  2 files changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
>> index 767a9d03aa32..030953d258c1 100644
>> --- a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
>> +++ b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
>> @@ -8,6 +8,8 @@ title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
>>  
>>  maintainers:
>>    - Melody Olvera <quic_molvera@quicinc.com>
>> +  - Taniya Das <quic_tdas@quicinc.com>
>> +  - Imran Shaik <quic_imrashai@quicinc.com>
> 
> I appreciate adding more maintainers, it is welcomed and needed.
> 
> However many of Qualcomm folks, including some of you, did not care
> enough to fix their old/incorrect email in existing entries, thus we
> have hundreds of wrong addresses and email bounces.
> 
> We already raised this internally and publicly, with just small effect,
> so I am not sure what to do more. For me, allowing to have outdated
> email in maintainers is an easiest proof that maintainer does not care.
> Adding more maintainer entries, while maintainer does not care, would
> not feel right. Maybe let's start with fixing existing entries?

+Cc Alex,

Let me emphasize more, because I did not see any follow up patches since
my previous email - there are many, many stale maintainer entries from
Qualcomm. Several of them have codeaurora.org email. Some have just old
emails of folks who left.

Can we expect fixing these?

Best regards,
Krzysztof
Imran Shaik June 23, 2023, 10:07 a.m. UTC | #2
On 6/22/2023 7:15 PM, Krzysztof Kozlowski wrote:
> On 16/06/2023 13:33, Krzysztof Kozlowski wrote:
>> On 16/06/2023 12:49, Imran Shaik wrote:
>>> Update the qcom GCC clock bindings and add v2 compatible string for QDU1000
>>> and QRU1000 SoCs.
>>>
>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>> Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
>>> ---
>>>   .../devicetree/bindings/clock/qcom,qdu1000-gcc.yaml         | 6 +++++-
>>>   include/dt-bindings/clock/qcom,qdu1000-gcc.h                | 4 +++-
>>>   2 files changed, 8 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
>>> index 767a9d03aa32..030953d258c1 100644
>>> --- a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
>>> +++ b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
>>> @@ -8,6 +8,8 @@ title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
>>>   
>>>   maintainers:
>>>     - Melody Olvera <quic_molvera@quicinc.com>
>>> +  - Taniya Das <quic_tdas@quicinc.com>
>>> +  - Imran Shaik <quic_imrashai@quicinc.com>
>>
>> I appreciate adding more maintainers, it is welcomed and needed.
>>
>> However many of Qualcomm folks, including some of you, did not care
>> enough to fix their old/incorrect email in existing entries, thus we
>> have hundreds of wrong addresses and email bounces.
>>
>> We already raised this internally and publicly, with just small effect,
>> so I am not sure what to do more. For me, allowing to have outdated
>> email in maintainers is an easiest proof that maintainer does not care.
>> Adding more maintainer entries, while maintainer does not care, would
>> not feel right. Maybe let's start with fixing existing entries?
> 
> +Cc Alex,
> 
> Let me emphasize more, because I did not see any follow up patches since
> my previous email - there are many, many stale maintainer entries from
> Qualcomm. Several of them have codeaurora.org email. Some have just old
> emails of folks who left.
> 
> Can we expect fixing these?

Sure, will post a separate clean up patch for fixing all the 
old/incorrect maintainers email addresses from all the binding files.

Thanks,
Imran

> 
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
index 767a9d03aa32..030953d258c1 100644
--- a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
@@ -8,6 +8,8 @@  title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
 
 maintainers:
   - Melody Olvera <quic_molvera@quicinc.com>
+  - Taniya Das <quic_tdas@quicinc.com>
+  - Imran Shaik <quic_imrashai@quicinc.com>
 
 description: |
   Qualcomm global clock control module which supports the clocks, resets and
@@ -17,7 +19,9 @@  description: |
 
 properties:
   compatible:
-    const: qcom,qdu1000-gcc
+    enum:
+      - qcom,qdu1000-gcc
+      - qcom,qdu1000-gcc-v2
 
   clocks:
     items:
diff --git a/include/dt-bindings/clock/qcom,qdu1000-gcc.h b/include/dt-bindings/clock/qcom,qdu1000-gcc.h
index ddbc6b825e80..2fd36cbfddbb 100644
--- a/include/dt-bindings/clock/qcom,qdu1000-gcc.h
+++ b/include/dt-bindings/clock/qcom,qdu1000-gcc.h
@@ -1,6 +1,6 @@ 
 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
 /*
- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef _DT_BINDINGS_CLK_QCOM_GCC_QDU1000_H
@@ -138,6 +138,8 @@ 
 #define GCC_AGGRE_NOC_ECPRI_GSI_CLK			128
 #define GCC_PCIE_0_PIPE_CLK_SRC				129
 #define GCC_PCIE_0_PHY_AUX_CLK_SRC			130
+#define GCC_GPLL1_OUT_EVEN				131
+#define GCC_DDRSS_ECPRI_GSI_CLK				132
 
 /* GCC resets */
 #define GCC_ECPRI_CC_BCR				0