@@ -212,10 +212,22 @@ static const struct dpu_pingpong_cfg sdm845_pp[] = {
};
static const struct dpu_dsc_cfg sdm845_dsc[] = {
- DSC_BLK("dsc_0", DSC_0, 0x80000, 0),
- DSC_BLK("dsc_1", DSC_1, 0x80400, 0),
- DSC_BLK("dsc_2", DSC_2, 0x80800, 0),
- DSC_BLK("dsc_3", DSC_3, 0x80c00, 0),
+ {
+ .name = "dsc_0", .id = DSC_0,
+ .base = 0x80000, .len = 0x1800,
+ },
+ {
+ .name = "dsc_1", .id = DSC_1,
+ .base = 0x80400, .len = 0x1800,
+ },
+ {
+ .name = "dsc_2", .id = DSC_2,
+ .base = 0x80800, .len = 0x1800,
+ },
+ {
+ .name = "dsc_3", .id = DSC_3,
+ .base = 0x80c00, .len = 0x1800,
+ },
};
static const struct dpu_intf_cfg sdm845_intf[] = {
@@ -259,10 +259,26 @@ static const struct dpu_merge_3d_cfg sm8150_merge_3d[] = {
};
static const struct dpu_dsc_cfg sm8150_dsc[] = {
- DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
+ {
+ .name = "dsc_0", .id = DSC_0,
+ .base = 0x80000, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_1", .id = DSC_1,
+ .base = 0x80400, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_2", .id = DSC_2,
+ .base = 0x80800, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_3", .id = DSC_3,
+ .base = 0x80c00, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
};
static const struct dpu_intf_cfg sm8150_intf[] = {
@@ -258,12 +258,36 @@ static const struct dpu_merge_3d_cfg sc8180x_merge_3d[] = {
};
static const struct dpu_dsc_cfg sc8180x_dsc[] = {
- DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_4", DSC_4, 0x81000, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_5", DSC_5, 0x81400, BIT(DPU_DSC_OUTPUT_CTRL)),
+ {
+ .name = "dsc_0", .id = DSC_0,
+ .base = 0x80000, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_1", .id = DSC_1,
+ .base = 0x80400, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_2", .id = DSC_2,
+ .base = 0x80800, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_3", .id = DSC_3,
+ .base = 0x80c00, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_4", .id = DSC_4,
+ .base = 0x81000, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_5", .id = DSC_5,
+ .base = 0x81400, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
};
static const struct dpu_intf_cfg sc8180x_intf[] = {
@@ -259,10 +259,26 @@ static const struct dpu_merge_3d_cfg sm8250_merge_3d[] = {
};
static const struct dpu_dsc_cfg sm8250_dsc[] = {
- DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
- DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
+ {
+ .name = "dsc_0", .id = DSC_0,
+ .base = 0x80000, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_1", .id = DSC_1,
+ .base = 0x80400, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_2", .id = DSC_2,
+ .base = 0x80800, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
+ {
+ .name = "dsc_3", .id = DSC_3,
+ .base = 0x80c00, .len = 0x1800,
+ .features = BIT(DPU_DSC_OUTPUT_CTRL),
+ },
};
static const struct dpu_intf_cfg sm8250_intf[] = {
@@ -490,16 +490,6 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
.sblk = NULL \
}
-/*************************************************************
- * DSC sub blocks config
- *************************************************************/
-#define DSC_BLK(_name, _id, _base, _features) \
- {\
- .name = _name, .id = _id, \
- .base = _base, .len = 0x140, \
- .features = _features, \
- }
-
/*************************************************************
* INTF sub blocks config
*************************************************************/
To simplify making changes to the hardware block definitions, expand corresponding macros. This way making all the changes are more obvious and visible in the source files. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 20 ++++++++--- .../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 24 ++++++++++--- .../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 36 +++++++++++++++---- .../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 24 ++++++++++--- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 ------ 5 files changed, 86 insertions(+), 28 deletions(-)