| Message ID | 1464443656-12108-4-git-send-email-evan.lloyd@arm.com |
|---|---|
| State | Superseded |
| Headers | show |
On 28 May 2016 at 14:54, <evan.lloyd@arm.com> wrote: > From: Evan Lloyd <evan.lloyd@arm.com> > > The variable LineControl was initialised to zero, then updated in a > condition. This change converts that to a write in each branch of the > condition, removing the Write/Read/Modify/Write sequence. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> > Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested on Juno R2 and FVP Foundation and AEMv8. Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> > --- > ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > index cd2cccad6295544b0b4d4c0aa4ceb7ac7b56a8e7..dd5f88d3d629d345a50af468ed394a269b35f52a 100644 > --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c > @@ -73,20 +73,19 @@ PL011UartInitializePort ( > UINT32 LineControl; > UINT32 Divisor; > > - LineControl = 0; > - > // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept > // 1 char buffer as the minimum FIFO size. Because everything can be rounded > // down, there is no maximum FIFO size. > if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) { > // Enable FIFO > - LineControl |= PL011_UARTLCR_H_FEN; > + LineControl = PL011_UARTLCR_H_FEN; > if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4) > *ReceiveFifoDepth = 32; > else > *ReceiveFifoDepth = 16; > } else { > - ASSERT (*ReceiveFifoDepth < 32); > + // Disable FIFO > + LineControl = 0; > // Nothing else to do. 1 byte FIFO is default. > *ReceiveFifoDepth = 1; > } > -- > Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c index cd2cccad6295544b0b4d4c0aa4ceb7ac7b56a8e7..dd5f88d3d629d345a50af468ed394a269b35f52a 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c @@ -73,20 +73,19 @@ PL011UartInitializePort ( UINT32 LineControl; UINT32 Divisor; - LineControl = 0; - // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept // 1 char buffer as the minimum FIFO size. Because everything can be rounded // down, there is no maximum FIFO size. if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) { // Enable FIFO - LineControl |= PL011_UARTLCR_H_FEN; + LineControl = PL011_UARTLCR_H_FEN; if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4) *ReceiveFifoDepth = 32; else *ReceiveFifoDepth = 16; } else { - ASSERT (*ReceiveFifoDepth < 32); + // Disable FIFO + LineControl = 0; // Nothing else to do. 1 byte FIFO is default. *ReceiveFifoDepth = 1; }