[v5,9/9] serial: sc16is7xx: improve comments about variants

Message ID	20230601163113.2785657-10-hugo@hugovil.com
State	Superseded
Headers	show Return-Path: <devicetree-owner@vger.kernel.org> From: Hugo Villeneuve <hugo@hugovil.com> To: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, jirislaby@kernel.org, jringle@gridpoint.com, l.perczak@camlintechnologies.com, tomasz.mon@camlingroup.com Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, hugo@hugovil.com, linux-gpio@vger.kernel.org, Hugo Villeneuve <hvilleneuve@dimonoff.com>, Lech Perczak <lech.perczak@camlingroup.com> Date: Thu, 1 Jun 2023 12:31:13 -0400 Message-Id: <20230601163113.2785657-10-hugo@hugovil.com> In-Reply-To: <20230601163113.2785657-1-hugo@hugovil.com> References: <20230601163113.2785657-1-hugo@hugovil.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [PATCH v5 9/9] serial: sc16is7xx: improve comments about variants Precedence: bulk
Series	serial: sc16is7xx: fix GPIO regression and rs485 improvements \| expand [v5,0/9] serial: sc16is7xx: fix GPIO regression and rs485 improvements [v5,1/9] serial: sc16is7xx: fix broken port 0 uart init [v5,2/9] serial: sc16is7xx: mark IOCONTROL register as volatile [v5,3/9] serial: sc16is7xx: refactor GPIO controller registration [v5,4/9] dt-bindings: sc16is7xx: Add property to change GPIO function [v5,5/9] serial: sc16is7xx: fix regression with GPIO configuration [v5,6/9] serial: sc16is7xx: fix bug when first setting GPIO direction [v5,7/9] serial: sc16is7xx: add call to get rs485 DT flags and properties [v5,8/9] serial: sc16is7xx: add post reset delay [v5,9/9] serial: sc16is7xx: improve comments about variants

Message ID

20230601163113.2785657-10-hugo@hugovil.com

State

Superseded

Headers

From: Hugo Villeneuve <hugo@hugovil.com>
To: gregkh@linuxfoundation.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
        jirislaby@kernel.org, jringle@gridpoint.com,
        l.perczak@camlintechnologies.com, tomasz.mon@camlingroup.com
Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, hugo@hugovil.com,
        linux-gpio@vger.kernel.org,
        Hugo Villeneuve <hvilleneuve@dimonoff.com>,
        Lech Perczak <lech.perczak@camlingroup.com>
Date: Thu,  1 Jun 2023 12:31:13 -0400
Message-Id: <20230601163113.2785657-10-hugo@hugovil.com>
In-Reply-To: <20230601163113.2785657-1-hugo@hugovil.com>
References: <20230601163113.2785657-1-hugo@hugovil.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: [PATCH v5 9/9] serial: sc16is7xx: improve comments about variants
Precedence: bulk

Series

serial: sc16is7xx: fix GPIO regression and rs485 improvements | expand

Commit Message

Hugo Villeneuve June 1, 2023, 4:31 p.m. UTC

From: Hugo Villeneuve <hvilleneuve@dimonoff.com>

Replace 740/750/760 with generic terms like 74x/75x/76x to account for
variants like 741, 752 and 762.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Lech Perczak <lech.perczak@camlingroup.com>
---
 drivers/tty/serial/sc16is7xx.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index 9b2d58023c55..59338f5ca180 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -223,7 +223,7 @@ 
  * trigger levels. Trigger levels from 4 characters to 60 characters are
  * available with a granularity of four.
  *
- * When the trigger level setting in TLR is zero, the SC16IS740/750/760 uses the
+ * When the trigger level setting in TLR is zero, the SC16IS74x/75x/76x uses the
  * trigger level setting defined in FCR. If TLR has non-zero trigger level value
  * the trigger level defined in FCR is discarded. This applies to both transmit
  * FIFO and receive FIFO trigger level setting.
@@ -234,7 +234,7 @@ 
 #define SC16IS7XX_TLR_TX_TRIGGER(words)	((((words) / 4) & 0x0f) << 0)
 #define SC16IS7XX_TLR_RX_TRIGGER(words)	((((words) / 4) & 0x0f) << 4)
 
-/* IOControl register bits (Only 750/760) */
+/* IOControl register bits (Only 75x/76x) */
 #define SC16IS7XX_IOCONTROL_LATCH_BIT	(1 << 0) /* Enable input latching */
 #define SC16IS7XX_IOCONTROL_MODEM_A_BIT	(1 << 1) /* Enable GPIO[7:4] as modem A pins */
 #define SC16IS7XX_IOCONTROL_MODEM_B_BIT	(1 << 2) /* Enable GPIO[3:0] as modem B pins */
@@ -249,9 +249,9 @@ 
 #define SC16IS7XX_EFCR_RTS_INVERT_BIT	(1 << 5) /* RTS output inversion */
 #define SC16IS7XX_EFCR_IRDA_MODE_BIT	(1 << 7) /* IrDA mode
 						  * 0 = rate upto 115.2 kbit/s
-						  *   - Only 750/760
+						  *   - Only 75x/76x
 						  * 1 = rate upto 1.152 Mbit/s
-						  *   - Only 760
+						  *   - Only 76x
 						  */
 
 /* EFR register bits */

[v5,9/9] serial: sc16is7xx: improve comments about variants

Commit Message

Patch