@@ -11,13 +11,6 @@ config USB_XHCI_HCD
if USB_XHCI_HCD
-config USB_XHCI_UNIPHIER
- bool "Support for UniPhier on-chip xHCI USB controller"
- depends on ARCH_UNIPHIER
- default y
- ---help---
- Enables support for the on-chip xHCI controller on UniPhier SoCs.
-
config USB_XHCI_DWC3
bool "DesignWare USB3 DRD Core Support"
help
@@ -63,7 +63,6 @@ obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
-obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o
# designware
obj-$(CONFIG_USB_DWC2) += dwc2.o
deleted file mode 100644
@@ -1,85 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <usb.h>
-#include <fdtdec.h>
-#include "xhci.h"
-
-static int get_uniphier_xhci_base(int index, struct xhci_hccr **base)
-{
- DECLARE_GLOBAL_DATA_PTR;
- int node_list[2];
- fdt_addr_t addr;
- int count;
-
- count = fdtdec_find_aliases_for_id(gd->fdt_blob, "usb",
- COMPAT_SOCIONEXT_XHCI, node_list,
- ARRAY_SIZE(node_list));
-
- if (index >= count)
- return -ENODEV;
-
- addr = fdtdec_get_addr(gd->fdt_blob, node_list[index], "reg");
- if (addr == FDT_ADDR_T_NONE)
- return -ENODEV;
-
- *base = (struct xhci_hccr *)addr;
-
- return 0;
-}
-
-#define USB3_RST_CTRL 0x00100040
-#define IOMMU_RST_N (1 << 5)
-#define LINK_RST_N (1 << 4)
-
-static void uniphier_xhci_reset(void __iomem *base, int on)
-{
- u32 tmp;
-
- tmp = readl(base + USB3_RST_CTRL);
-
- if (on)
- tmp &= ~(IOMMU_RST_N | LINK_RST_N);
- else
- tmp |= IOMMU_RST_N | LINK_RST_N;
-
- writel(tmp, base + USB3_RST_CTRL);
-}
-
-int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
-{
- int ret;
- struct xhci_hccr *cr;
- struct xhci_hcor *or;
-
- ret = get_uniphier_xhci_base(index, &cr);
- if (ret < 0)
- return ret;
-
- uniphier_xhci_reset(cr, 0);
-
- or = (void *)cr + HC_LENGTH(xhci_readl(&cr->cr_capbase));
-
- *hccr = cr;
- *hcor = or;
-
- return 0;
-}
-
-void xhci_hcd_stop(int index)
-{
- int ret;
- struct xhci_hccr *cr;
-
- ret = get_uniphier_xhci_base(index, &cr);
- if (ret < 0)
- return;
-
- uniphier_xhci_reset(cr, 1);
-}
@@ -158,7 +158,6 @@ enum fdt_compat_id {
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */
COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */
- COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */
COMPAT_INTEL_PCH, /* Intel PCH */
COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */
COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */
@@ -63,7 +63,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(AMS_AS3722, "ams,as3722"),
COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
- COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),