| Message ID | 20230501170531.2961459-1-hugo@hugovil.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay | expand |
On Mon, May 01, 2023 at 01:05:32PM -0400, Hugo Villeneuve wrote: > From: Hugo Villeneuve <hvilleneuve@dimonoff.com> > > While testing the ethernet interface on a Variscite symphony carrier > board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware > configuration), the ethernet PHY is not detected. > > The ADIN1300 datasheet indicate that the "Management interface > active (t4)" state is reached at most 5ms after the reset signal is > deasserted. > > The device tree in Variscite custom git repository uses the following > property: > > phy-reset-post-delay = <20>; > > Add a new MDIO property 'reset-deassert-us' of 20ms to have the same > delay inside the ethphy node. Adding this property fixes the problem > with the PHY detection. > > Note that this SOM can also have an Atheros AR8033 PHY. In this case, > a 1ms deassert delay is sufficient. Add a comment to that effect. > > Fixes: ade0176dd8a0 ("arm64: dts: imx8mn-var-som: Add Variscite > VAR-SOM-MX8MN System on Module") > > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Applied, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi index 67072e6c77d5..cbd9d124c80d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi @@ -98,11 +98,17 @@ mdio { #address-cells = <1>; #size-cells = <0>; - ethphy: ethernet-phy@4 { + ethphy: ethernet-phy@4 { /* AR8033 or ADIN1300 */ compatible = "ethernet-phy-ieee802.3-c22"; reg = <4>; reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; + /* + * Deassert delay: + * ADIN1300 requires 5ms. + * AR8033 requires 1ms. + */ + reset-deassert-us = <20000>; }; }; };