| Message ID | 20230407184546.161168-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 2cf599ed720e353c1a4e7d7932d4252ce30360dd |
| Headers | show |
| Series | [01/40] dt-bindings: pinctrl: qcom,ipq5332-tlmm: simplify with unevaluatedProperties | expand |
On Fri, Apr 7, 2023 at 8:54 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 07/04/2023 20:45, Krzysztof Kozlowski wrote: > > All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar > > capabilities regarding pin properties, thus we can just accept entire > > set provided by qcom,tlmm-common.yaml schema. > > > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Linus, > > If you prefer I can send all these to you in a pull after getting some acks. That would be best, thanks! Also the refactoring looks nice. Yours, Linus Walleij
On 11/04/2023 19:35, Rob Herring wrote: > On Fri, Apr 07, 2023 at 08:54:43PM +0200, Krzysztof Kozlowski wrote: >> On 07/04/2023 20:45, Krzysztof Kozlowski wrote: >>> All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar >>> capabilities regarding pin properties, thus we can just accept entire >>> set provided by qcom,tlmm-common.yaml schema. >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>> --- >> >> Linus, >> >> If you prefer I can send all these to you in a pull after getting some acks. >> >> >> Rob, >> >> Feel free to ack once for all of them. > > There's no cover letter to ack them all (and b4 to pick up), but I guess > that's your own problem in this case. For the series: > > Acked-by: Rob Herring <robh@kernel.org> > > IMO, this should just be 1 patch. It's 1 change for 1 platform family > for 1 subsystem. There's just no point when it's all the same people > that will review it and apply it. My previous patches of approximately this size were bouncing from the lists, so I wanted to avoid this. Also, some of the bindings actually have different maintainers. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml index 300747252a7b..3d3086ae1ba6 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml @@ -56,6 +56,7 @@ $defs: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false properties: pins: @@ -92,19 +93,9 @@ $defs: rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci_txd, wci_rxd, wsi_clk, wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem ] - bias-pull-down: true - bias-pull-up: true - bias-disable: true - drive-strength: true - input-enable: true - output-high: true - output-low: true - required: - pins - additionalProperties: false - required: - compatible - reg
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar capabilities regarding pin properties, thus we can just accept entire set provided by qcom,tlmm-common.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../bindings/pinctrl/qcom,ipq5332-tlmm.yaml | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-)