| Message ID | 20230327134734.3256974-3-abel.vesa@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | Add dedicated Qcom ICE driver | expand |
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 64df6919abaf..0ad14d5b722e 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -120,6 +120,10 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: platform specific settings for DLL_CONFIG reg. + qcom,ice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the Inline Crypto Engine node + iommus: minItems: 1 maxItems: 8
Starting with SM8550, the ICE will have its own devicetree node so add the qcom,ice property to reference it. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- The v3 (RFC) is here: https://lore.kernel.org/all/20230313115202.3960700-3-abel.vesa@linaro.org/ Changes since v3: * dropped the "and drop core clock" part from subject line Changes since v2: * dropped all changes except the qcom,ice property Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 4 ++++ 1 file changed, 4 insertions(+)