| Message ID | 1328637417-29958-1-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | Accepted |
| Commit | 2d2624a001010548e3e170d812e0f116b78501aa |
| Headers | show |
On 7 February 2012 18:56, Peter Maydell <peter.maydell@linaro.org> wrote: > The correct FPSID for the Cortex-A9 (according to the TRM) is > 0x41033090 for the r0p0 that we claim to model. Thanks, applied this patch. Cheers
diff --git a/target-arm/helper.c b/target-arm/helper.c index ea4f35f..34b226e 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -157,7 +157,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) * and valid configurations; we don't model A9UP). */ set_feature(env, ARM_FEATURE_V7MP); - env->vfp.xregs[ARM_VFP_FPSID] = 0x41034000; /* Guess */ + env->vfp.xregs[ARM_VFP_FPSID] = 0x41033090; env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222; env->vfp.xregs[ARM_VFP_MVFR1] = 0x01111111; memcpy(env->cp15.c0_c1, cortexa9_cp15_c0_c1, 8 * sizeof(uint32_t));
The correct FPSID for the Cortex-A9 (according to the TRM) is 0x41033090 for the r0p0 that we claim to model. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target-arm/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)