| Message ID | 20230316080451.475020-1-b-kapoor@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | mmc: sdhci_am654: Set HIGH_SPEED_ENA for SDR25 and SDR50 | expand |
diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 7ef828942df3..ac90e86bb0a0 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -351,8 +351,6 @@ static void sdhci_am654_write_b(struct sdhci_host *host, u8 val, int reg) */ case MMC_TIMING_SD_HS: case MMC_TIMING_MMC_HS: - case MMC_TIMING_UHS_SDR12: - case MMC_TIMING_UHS_SDR25: val &= ~SDHCI_CTRL_HISPD; } }
Timing Information in Datasheet assumes that HIGH_SPEED_ENA=1 should be set for SDR25 and SDR50 modes. But sdhci_am654 driver clears HIGH_SPEED_ENA register. Thus, Modify sdhci_am654 to not clear HIGH_SPEED_ENA (HOST_CONTROL[2]) bit for SDR12 and SDR25 speed modes. Fixes: e374e87538f4 ("mmc: sdhci_am654: Clear HISPD_ENA in some lower speed modes") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> --- drivers/mmc/host/sdhci_am654.c | 2 -- 1 file changed, 2 deletions(-)