diff mbox series

[v3,9/9] i2c: designware: Add support for AMDI0020 ACPI ID

Message ID 20230303165050.2918-10-mario.limonciello@amd.com
State New
Headers show
Series Export platform features from ccp driver | expand

Commit Message

Mario Limonciello March 3, 2023, 4:50 p.m. UTC 
Cezanne and Skyrim have the same PSP hardware but use a different
protocol to negotiate I2C arbitration. To disambiguate this going
forward introduce a new ACPI ID to represent the protocol that utilizes
a doorbell.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v2->v3:
 * Split from earlier patch to standalone
---
 drivers/i2c/busses/i2c-designware-amdpsp.c  | 5 +++--
 drivers/i2c/busses/i2c-designware-platdrv.c | 1 +
 2 files changed, 4 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-designware-amdpsp.c b/drivers/i2c/busses/i2c-designware-amdpsp.c
index 2c671973010d..44b8432458b0 100644
--- a/drivers/i2c/busses/i2c-designware-amdpsp.c
+++ b/drivers/i2c/busses/i2c-designware-amdpsp.c
@@ -101,11 +101,12 @@  static int psp_send_i2c_req_amdi0019(enum psp_i2c_req_type i2c_req_type)
 
 static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type)
 {
+	const char *hid = acpi_device_hid(ACPI_COMPANION(psp_i2c_dev));
 	unsigned long start = jiffies;
 	int ret;
 
-	/* Use doorbell for Skyrim and mailbox for Cezanne */
-	if (boot_cpu_data.x86 == 25 && boot_cpu_data.x86_model == 80)
+	/* Use doorbell for AMDI0020 and mailbox for AMDI0019 */
+	if (!strcmp(hid, "AMDI0019"))
 		ret = psp_send_i2c_req_amdi0019(i2c_req_type);
 	else
 		ret = psp_ring_platform_doorbell(i2c_req_type);
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 89ad88c54754..5ca71bda9ac2 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -51,6 +51,7 @@  static const struct acpi_device_id dw_i2c_acpi_match[] = {
 	{ "AMD0010", ACCESS_INTR_MASK },
 	{ "AMDI0010", ACCESS_INTR_MASK },
 	{ "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
+	{ "AMDI0020", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
 	{ "AMDI0510", 0 },
 	{ "APMC0D0F", 0 },
 	{ "HISI02A1", 0 },