| Message ID | 20230306003954.1866998-1-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Mon, 6 Mar 2023 at 00:39, Richard Henderson <richard.henderson@linaro.org> wrote: > > The following changes since commit 2946e1af2704bf6584f57d4e3aec49d1d5f3ecc0: > > configure: Disable thread-safety warnings on macOS (2023-03-04 14:03:46 +0000) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230305 > > for you to fetch changes up to b6611d8d5c265c138a4a0cc36a2c02d84a768976: > > target/xtensa: Avoid tcg_const_i32 (2023-03-05 13:47:25 -0800) > > ---------------------------------------------------------------- > tcg: Merge two sequential labels > accel/tcg: Retain prot flags from tlb_fill > accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup > accel/tcg: Honor TLB_WATCHPOINTS in atomic_mmu_lookup > target/sparc: Use tlb_set_page_full > include/qemu/cpuid: Introduce xgetbv_low > tcg/i386: Mark Win64 call-saved vector regs as reserved > tcg: Decode the operand to INDEX_op_mb in dumps > > Portion of the target/ patchset which eliminates use of tcg_temp_free* > Portion of the target/ patchset which eliminates use of tcg_const* > > ---------------------------------------------------------------- Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
The following changes since commit 2946e1af2704bf6584f57d4e3aec49d1d5f3ecc0: configure: Disable thread-safety warnings on macOS (2023-03-04 14:03:46 +0000) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230305 for you to fetch changes up to b6611d8d5c265c138a4a0cc36a2c02d84a768976: target/xtensa: Avoid tcg_const_i32 (2023-03-05 13:47:25 -0800) ---------------------------------------------------------------- tcg: Merge two sequential labels accel/tcg: Retain prot flags from tlb_fill accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup accel/tcg: Honor TLB_WATCHPOINTS in atomic_mmu_lookup target/sparc: Use tlb_set_page_full include/qemu/cpuid: Introduce xgetbv_low tcg/i386: Mark Win64 call-saved vector regs as reserved tcg: Decode the operand to INDEX_op_mb in dumps Portion of the target/ patchset which eliminates use of tcg_temp_free* Portion of the target/ patchset which eliminates use of tcg_const* ---------------------------------------------------------------- Richard Henderson (83): tcg: Link branches to the labels tcg: Merge two sequential labels target/sparc: Use tlb_set_page_full accel/tcg: Retain prot flags from tlb_fill accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup softmmu: Check watchpoints for read+write at once accel/tcg: Trigger watchpoints from atomic_mmu_lookup include/qemu/cpuid: Introduce xgetbv_low tcg/i386: Mark Win64 call-saved vector regs as reserved tcg: Decode the operand to INDEX_op_mb in dumps tcg: Remove tcg_check_temp_count, tcg_clear_temp_count accel/tcg: Remove translator_loop_temp_check target/alpha: Drop tcg_temp_free target/arm: Remove arm_free_cc, a64_free_cc target/arm: Remove value_global from DisasCompare target/arm: Drop tcg_temp_free from translator.c target/arm: Drop DisasContext.tmp_a64 target/arm: Drop new_tmp_a64 target/arm: Drop new_tmp_a64_zero target/arm: Drop tcg_temp_free from translator-a64.c target/arm: Drop tcg_temp_free from translator-m-nocp.c target/arm: Drop tcg_temp_free from translator-mve.c target/arm: Drop tcg_temp_free from translator-neon.c target/arm: Drop tcg_temp_free from translator-sme.c target/arm: Drop tcg_temp_free from translator-sve.c target/arm: Drop tcg_temp_free from translator-vfp.c target/arm: Drop tcg_temp_free from translator.h target/avr: Drop DisasContext.free_skip_var0 target/avr: Drop R from trans_COM target/avr: Drop tcg_temp_free target/cris: Drop cris_alu_free_temps target/cris: Drop cris_alu_m_free_temps target/cris: Drop addr from dec10_ind_move_m_pr target/cris: Drop tcg_temp_free target/hexagon: Drop tcg_temp_free from C code target/hexagon: Drop tcg_temp_free from gen_tcg_funcs.py target/hexagon/idef-parser: Drop tcg_temp_free target/hexagon/idef-parser: Drop HexValue.is_manual target/hppa: Drop tcg_temp_free target/loongarch: Drop temp_new target/loongarch: Drop tcg_temp_free target/m68k: Drop mark_to_release target/m68k: Drop free_cond target/m68k: Drop tcg_temp_free target/microblaze: Drop tcg_temp_free target/nios2: Drop tcg_temp_free target/openrisc: Drop tcg_temp_free target/ppc: Drop tcg_temp_free target/riscv: Drop ftemp_new target/riscv: Drop temp_new target/riscv: Drop tcg_temp_free target/rx: Drop tcg_temp_free target/sh4: Drop tcg_temp_free target/sparc: Drop get_temp_tl target/sparc: Drop get_temp_i32 target/sparc: Remove egress label in disas_sparc_context target/sparc: Drop free_compare target/sparc: Drop tcg_temp_free target/xtensa: Drop reset_sar_tracker target/xtensa: Drop tcg_temp_free target/i386: Drop tcg_temp_free target/mips: Drop tcg_temp_free from mips16e_translate.c.inc target/mips: Fix trans_mult_acc return target/tricore: Drop tcg_temp_free include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start tracing: remove transform.py docs/devel/tcg-ops: Drop recommendation to free temps target/hexagon: Use tcg_constant_* for gen_constant_from_imm target/hexagon/idef-parser: Use gen_tmp for LPCFG target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op target/i386: Simplify POPF target/microblaze: Avoid tcg_const_* throughout target/riscv: Avoid tcg_const_* target/s390x: Split out gen_ri2 target/sparc: Avoid tcg_const_{tl,i32} target/xtensa: Tidy translate_bb target/xtensa: Tidy translate_clamps target/xtensa: Avoid tcg_const_i32 in translate_l32r target/xtensa: Use tcg_gen_subfi_i32 in translate_sll target/xtensa: Split constant in bit shift target/xtensa: Avoid tcg_const_i32 Richard W.M. Jones (1): tcg: Include "qemu/timer.h" for profile_getclock docs/devel/tcg-ops.rst | 4 - target/hexagon/idef-parser/README.rst | 8 - meson.build | 1 - include/exec/gen-icount.h | 2 - include/exec/translator.h | 2 - include/hw/core/cpu.h | 7 +- include/qemu/cpuid.h | 7 + include/tcg/tcg-op.h | 7 +- include/tcg/tcg.h | 33 +- target/arm/tcg/translate-a64.h | 2 - target/arm/tcg/translate.h | 7 - target/hexagon/gen_tcg.h | 29 - target/hexagon/gen_tcg_hvx.h | 15 - target/hexagon/idef-parser/idef-parser.h | 1 - target/hexagon/idef-parser/parser-helpers.h | 10 - target/hexagon/macros.h | 7 - target/loongarch/translate.h | 3 - accel/tcg/cputlb.c | 43 +- accel/tcg/tcg-accel-ops.c | 1 + accel/tcg/translate-all.c | 1 + accel/tcg/translator.c | 16 - softmmu/runstate.c | 1 + softmmu/watchpoint.c | 19 +- target/alpha/translate.c | 71 --- target/arm/tcg/translate-a64.c | 594 ++------------------- target/arm/tcg/translate-m-nocp.c | 20 - target/arm/tcg/translate-mve.c | 52 -- target/arm/tcg/translate-neon.c | 131 +---- target/arm/tcg/translate-sme.c | 28 - target/arm/tcg/translate-sve.c | 206 +------ target/arm/tcg/translate-vfp.c | 193 ------- target/arm/tcg/translate.c | 281 +--------- target/avr/translate.c | 251 --------- target/cris/translate.c | 113 ---- target/hexagon/genptr.c | 58 -- target/hexagon/idef-parser/parser-helpers.c | 206 +------ target/hexagon/translate.c | 7 - target/hppa/translate.c | 93 +--- target/i386/tcg/translate.c | 96 +--- target/loongarch/translate.c | 21 +- target/m68k/translate.c | 276 +--------- target/microblaze/translate.c | 89 +-- target/mips/tcg/vr54xx_translate.c | 2 +- target/nios2/translate.c | 15 - target/openrisc/translate.c | 39 -- target/ppc/translate.c | 285 ---------- target/riscv/translate.c | 65 +-- target/rx/translate.c | 84 --- target/s390x/tcg/translate.c | 23 +- target/sh4/translate.c | 110 ---- target/sparc/mmu_helper.c | 121 ++--- target/sparc/translate.c | 339 +++--------- target/tricore/translate.c | 540 +------------------ target/xtensa/translate.c | 171 +----- tcg/tcg-op.c | 22 +- tcg/tcg.c | 208 ++++++-- util/bufferiszero.c | 3 +- target/cris/translate_v10.c.inc | 49 +- target/i386/tcg/decode-new.c.inc | 15 - target/i386/tcg/emit.c.inc | 6 - target/loongarch/insn_trans/trans_arith.c.inc | 12 - target/loongarch/insn_trans/trans_atomic.c.inc | 3 - target/loongarch/insn_trans/trans_bit.c.inc | 12 - target/loongarch/insn_trans/trans_fcmp.c.inc | 3 - target/loongarch/insn_trans/trans_fmemory.c.inc | 20 +- target/loongarch/insn_trans/trans_fmov.c.inc | 6 - target/loongarch/insn_trans/trans_memory.c.inc | 34 +- target/loongarch/insn_trans/trans_privileged.c.inc | 6 +- target/loongarch/insn_trans/trans_shift.c.inc | 11 - target/mips/tcg/mips16e_translate.c.inc | 6 - target/ppc/power8-pmu-regs.c.inc | 16 - target/ppc/translate/dfp-impl.c.inc | 20 - target/ppc/translate/fixedpoint-impl.c.inc | 16 - target/ppc/translate/fp-impl.c.inc | 122 +---- target/ppc/translate/spe-impl.c.inc | 59 -- target/ppc/translate/storage-ctrl-impl.c.inc | 2 - target/ppc/translate/vmx-impl.c.inc | 296 +--------- target/ppc/translate/vsx-impl.c.inc | 287 +--------- target/riscv/insn_trans/trans_rvb.c.inc | 24 - target/riscv/insn_trans/trans_rvd.c.inc | 2 - target/riscv/insn_trans/trans_rvf.c.inc | 9 - target/riscv/insn_trans/trans_rvi.c.inc | 37 -- target/riscv/insn_trans/trans_rvk.c.inc | 15 - target/riscv/insn_trans/trans_rvm.c.inc | 33 -- target/riscv/insn_trans/trans_rvv.c.inc | 59 +- target/riscv/insn_trans/trans_rvzfh.c.inc | 14 +- target/riscv/insn_trans/trans_xthead.c.inc | 24 +- tcg/i386/tcg-target.c.inc | 24 +- scripts/tracetool/__init__.py | 23 - scripts/tracetool/transform.py | 168 ------ target/hexagon/README | 5 - target/hexagon/gen_tcg_funcs.py | 79 +-- target/hexagon/idef-parser/idef-parser.y | 14 +- 93 files changed, 579 insertions(+), 5991 deletions(-) delete mode 100644 scripts/tracetool/transform.py