[37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc

Message ID	20230227054233.390271-38-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, jcmvbkbc@gmail.com, kbastian@mail.uni-paderborn.de, ysato@users.sourceforge.jp, gaosong@loongson.cn, jiaxun.yang@flygoat.com, tsimpson@quicinc.com, ale@rev.ng, mrolnik@gmail.com, edgar.iglesias@gmail.com Subject: [PATCH 37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc Date: Sun, 26 Feb 2023 19:42:00 -1000 Message-Id: <20230227054233.390271-38-richard.henderson@linaro.org> In-Reply-To: <20230227054233.390271-1-richard.henderson@linaro.org> References: <20230227054233.390271-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	tcg: Remove tcg_const_* \| expand [00/70] tcg: Remove tcg_const_* [01/70] target/arm: Use rmode >= 0 for need_rmode [02/70] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf [03/70] target/arm: Improve arm_rmode_to_sf [04/70] target/arm: Consistently use ARMFPRounding during translation [05/70] target/arm: Create gen_set_rmode, gen_restore_rmode [06/70] target/arm: Improve trans_BFCI [07/70] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str} [08/70] target/arm: Avoid tcg_const_* in translate-mve.c [09/70] target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn [10/70] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn [11/70] target/arm: Avoid tcg_const_ptr in handle_rev [12/70] target/avr: Avoid use of tcg_const_i32 in SBIC, SBIS [13/70] target/avr: Avoid use of tcg_const_i32 throughout [14/70] target/cris: Avoid use of tcg_const_i32 throughout [15/70] target/hexagon: Use tcg_constant_* for gen_constant_from_imm [16/70] target/hexagon/idef-parser: Use gen_tmp for LPCFG [17/70] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign [18/70] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred [19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op [20/70] target/hppa: Avoid tcg_const_i64 in trans_fid_f [21/70] target/hppa: Avoid use of tcg_const_i32 throughout [22/70] target/i386: Simplify POPF [23/70] target/i386: Avoid use of tcg_const_* throughout [24/70] target/m68k: Reject immediate as destination in gen_ea_mode [25/70] target/m68k: Use tcg_constant_i32 in gen_ea_mode [26/70] target/m68k: Avoid tcg_const_i32 when modified [27/70] target/m68k: Avoid tcg_const_i32 in bfop_reg [28/70] target/m68k: Avoid tcg_const_* throughout [29/70] target/microblaze: Avoid tcg_const_* throughout [30/70] target/mips: Split out gen_lxl [31/70] target/mips: Split out gen_lxr [32/70] target/mips: Avoid tcg_const_tl in gen_r6_ld [33/70] target/mips: Avoid tcg_const_* throughout [34/70] target/ppc: Split out gen_vx_vmul10 [35/70] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad [36/70] target/ppc: Avoid tcg_const_i64 in do_vcntmb [37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc [38/70] target/ppc: Avoid tcg_const_* in xxeval [39/70] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc [40/70] target/ppc: Avoid tcg_const_* in fp-impl.c.inc [41/70] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc [42/70] target/ppc: Rewrite trans_ADDG6S [43/70] target/ppc: Fix gen_tlbsx_booke206 [44/70] target/ppc: Avoid tcg_const_* in translate.c [45/70] target/riscv: Avoid tcg_const_* [46/70] target/rx: Use tcg_gen_abs_i32 [47/70] target/rx: Use cpu_psw_z as temp in flags computation [48/70] target/rx: Avoid tcg_const_i32 when new temp needed [49/70] target/rx: Avoid tcg_const_i32 [50/70] target/s390x: Split out gen_ri2 [51/70] target/s390x: Avoid tcg_const_i64 [52/70] target/sh4: Avoid tcg_const_i32 for TAS.B [53/70] target/sh4: Avoid tcg_const_i32 [54/70] tcg/sparc: Avoid tcg_const_tl in gen_edge [55/70] target/sparc: Avoid tcg_const_{tl,i32} [56/70] target/tricore: Split t_n as constant from temp as variable [57/70] target/tricore: Rename t_off10 and use tcg_constant_i32 [58/70] target/tricore: Use min/max for saturate [59/70] target/tricore: Use setcondi instead of explicit allocation [60/70] target/tricore: Drop some temp initialization [61/70] target/tricore: Avoid tcg_const_i32 [62/70] target/xtensa: Tidy translate_bb [63/70] target/xtensa: Tidy translate_clamps [64/70] target/xtensa: Avoid tcg_const_i32 in translate_l32r [65/70] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll [66/70] target/xtensa: Split constant in bit shift [67/70] target/xtensa: Avoid tcg_const_i32 [68/70] tcg: Replace tcg_const_i64 in tcg-op.c [69/70] tcg: Drop tcg_const__vec [70/70] tcg: Drop tcg_const_

Message ID

20230227054233.390271-38-richard.henderson@linaro.org

State

Superseded

Headers

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 qemu-s390x@nongnu.org, jcmvbkbc@gmail.com, kbastian@mail.uni-paderborn.de,
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 edgar.iglesias@gmail.com
Subject: [PATCH 37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc
Date: Sun, 26 Feb 2023 19:42:00 -1000
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Series

tcg: Remove tcg_const_* | expand

Commit Message

Richard Henderson Feb. 27, 2023, 5:42 a.m. UTC

All remaining uses are strictly read-only.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/translate/vmx-impl.c.inc | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
index ca27c11d87..112233b541 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1624,7 +1624,7 @@  static void glue(gen_, name)(DisasContext *ctx)                         \
             gen_exception(ctx, POWERPC_EXCP_VPU);                       \
             return;                                                     \
         }                                                               \
-        uimm = tcg_const_i32(UIMM5(ctx->opcode));                       \
+        uimm = tcg_constant_i32(UIMM5(ctx->opcode));                    \
         rb = gen_avr_ptr(rB(ctx->opcode));                              \
         rd = gen_avr_ptr(rD(ctx->opcode));                              \
         gen_helper_##name(cpu_env, rd, rb, uimm);                       \
@@ -1965,7 +1965,7 @@  static void gen_vsldoi(DisasContext *ctx)
     ra = gen_avr_ptr(rA(ctx->opcode));
     rb = gen_avr_ptr(rB(ctx->opcode));
     rd = gen_avr_ptr(rD(ctx->opcode));
-    sh = tcg_const_i32(VSH(ctx->opcode));
+    sh = tcg_constant_i32(VSH(ctx->opcode));
     gen_helper_vsldoi(rd, ra, rb, sh);
 }
 
@@ -2575,7 +2575,7 @@  static void gen_##op(DisasContext *ctx)             \
     rb = gen_avr_ptr(rB(ctx->opcode));              \
     rd = gen_avr_ptr(rD(ctx->opcode));              \
                                                     \
-    ps = tcg_const_i32((ctx->opcode & 0x200) != 0); \
+    ps = tcg_constant_i32((ctx->opcode & 0x200) != 0); \
                                                     \
     gen_helper_##op(cpu_crf[6], rd, ra, rb, ps);    \
 }
@@ -2594,7 +2594,7 @@  static void gen_##op(DisasContext *ctx)             \
     rb = gen_avr_ptr(rB(ctx->opcode));              \
     rd = gen_avr_ptr(rD(ctx->opcode));              \
                                                     \
-    ps = tcg_const_i32((ctx->opcode & 0x200) != 0); \
+    ps = tcg_constant_i32((ctx->opcode & 0x200) != 0); \
                                                     \
     gen_helper_##op(cpu_crf[6], rd, rb, ps);        \
 }
@@ -2726,7 +2726,7 @@  static void gen_##op(DisasContext *ctx)       \
     }                                         \
     ra = gen_avr_ptr(rA(ctx->opcode));        \
     rd = gen_avr_ptr(rD(ctx->opcode));        \
-    st_six = tcg_const_i32(rB(ctx->opcode));  \
+    st_six = tcg_constant_i32(rB(ctx->opcode));  \
     gen_helper_##op(rd, ra, st_six);          \
 }

[37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc

Commit Message

Patch