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[v3,1/3] thunderbolt: Adjust how NVM reading works

Message ID 20230216201910.12370-2-mario.limonciello@amd.com
State New
Headers show
Series Fix problems fetching TBT3 DROM from AMD USB4 routers | expand

Commit Message

Mario Limonciello Feb. 16, 2023, 8:19 p.m. UTC 
Some TBT3 devices have a hard time reliably responding to bit banging
requests correctly when connected to AMD USB4 hosts running Linux.

These problems are not reported in any other CM supported on AMD platforms,
and comparing the Windows and Pre-OS implementations the Linux CM is the
only one that utilizes bit banging to access the DROM.
Other CM implementations access the DROM directly from the NVM instead of
bit banging.

Adjust the flow to use this method to fetch the NVM when the downstream
device has an LC that can be used to fetch the UUID later. The bit banging
method will only be used if this has failed or no LC is present.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v2->v3:
    * Split out refactor
v1->v2:
    * Update commit message to indicate which CMs are tested
    * Adjust flow to only fetch DROM from NVM on TBT3 and bit bang on TBT1/2
---
 drivers/thunderbolt/eeprom.c | 4 ++++
 1 file changed, 4 insertions(+)
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Patch

diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c
index c90d22f56d4e..177bc51316f7 100644
--- a/drivers/thunderbolt/eeprom.c
+++ b/drivers/thunderbolt/eeprom.c
@@ -640,6 +640,10 @@  int tb_drom_read(struct tb_switch *sw)
 		return 0;
 	}
 
+	/* We can use LC to get UUID later */
+	if (sw->cap_lc && tb_drom_copy_nvm(sw, &size) == 0)
+		goto parse;
+
 	res = tb_drom_read_n(sw, 14, (u8 *) &size, 2);
 	if (res)
 		return res;