Message ID | 20230201153019.269718-3-krzysztof.kozlowski@linaro.org |
---|---|
State | Accepted |
Commit | a51c1f0244c84e482f1ceb4701c38aaa4b224baf |
Headers | show |
Series | [1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern | expand |
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml index e4231d10d76f..75216fc7c8bd 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml @@ -63,7 +63,7 @@ $defs: subnode. items: oneOf: - - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$" + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$" - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] minItems: 1 @@ -134,7 +134,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 157>; + gpio-ranges = <&tlmm 0 0 156>; gpio-wo-subnode-state { pins = "gpio1";
The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern and gpio-ranges in the example. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)