| Message ID | 1459416820-18789-1-git-send-email-wangkefeng.wang@huawei.com |
|---|---|
| State | Superseded |
| Headers | show |
On 2016/3/31 17:33, Kefeng Wang wrote: > Fix commit abf9c25d55e8 ("arm64: dts: hip05: Append all gicv3 ITS > entries"), it forgets the property msi-cell, see arm,gic-v3.txt. Sorry, ignore this, will send v2, should #msi-cell. > Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> > --- > arch/arm64/boot/dts/hisilicon/hip05.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi > index 6319ff3..d1911ea 100644 > --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi > @@ -249,24 +249,28 @@ > its_peri: interrupt-controller@8c000000 { > compatible = "arm,gic-v3-its"; > msi-controller; > + msi-cells = <1>; > reg = <0x0 0x8c000000 0x0 0x40000>; > }; > > its_m3: interrupt-controller@a3000000 { > compatible = "arm,gic-v3-its"; > msi-controller; > + msi-cells = <1>; > reg = <0x0 0xa3000000 0x0 0x40000>; > }; > > its_pcie: interrupt-controller@b7000000 { > compatible = "arm,gic-v3-its"; > msi-controller; > + msi-cells = <1>; > reg = <0x0 0xb7000000 0x0 0x40000>; > }; > > its_dsa: interrupt-controller@c6000000 { > compatible = "arm,gic-v3-its"; > msi-controller; > + msi-cells = <1>; > reg = <0x0 0xc6000000 0x0 0x40000>; > }; > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index 6319ff3..d1911ea 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -249,24 +249,28 @@ its_peri: interrupt-controller@8c000000 { compatible = "arm,gic-v3-its"; msi-controller; + msi-cells = <1>; reg = <0x0 0x8c000000 0x0 0x40000>; }; its_m3: interrupt-controller@a3000000 { compatible = "arm,gic-v3-its"; msi-controller; + msi-cells = <1>; reg = <0x0 0xa3000000 0x0 0x40000>; }; its_pcie: interrupt-controller@b7000000 { compatible = "arm,gic-v3-its"; msi-controller; + msi-cells = <1>; reg = <0x0 0xb7000000 0x0 0x40000>; }; its_dsa: interrupt-controller@c6000000 { compatible = "arm,gic-v3-its"; msi-controller; + msi-cells = <1>; reg = <0x0 0xc6000000 0x0 0x40000>; }; };
Fix commit abf9c25d55e8 ("arm64: dts: hip05: Append all gicv3 ITS entries"), it forgets the property msi-cell, see arm,gic-v3.txt. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> --- arch/arm64/boot/dts/hisilicon/hip05.dtsi | 4 ++++ 1 file changed, 4 insertions(+) -- 1.7.12.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel