| Message ID | 20230119035136.21603-3-blarson@amd.com |
|---|---|
| State | New |
| Headers | show
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From: Brad Larson <blarson@amd.com>
To: <linux-arm-kernel@lists.infradead.org>
CC: <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
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Subject: [PATCH v9 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC
Date: Wed, 18 Jan 2023 19:51:23 -0800
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|
| Series |
Support AMD Pensando Elba SoC
|
expand
|
diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index 8b1a0fdcb5e3..f7dd6f990f96 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -16,12 +16,14 @@ properties: compatible: items: - enum: + - amd,pensando-elba-sd4hc - microchip,mpfs-sd4hc - socionext,uniphier-sd4hc - const: cdns,sd4hc reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: maxItems: 1 @@ -111,12 +113,36 @@ properties: minimum: 0 maximum: 0x7f + reset-names: + items: + - const: hw + + resets: + description: + optional. phandle to the system reset controller with line index + for mmc hw reset line if exists. + maxItems: 1 + required: - compatible - reg - interrupts - clocks +if: + properties: + compatible: + const: amd,pensando-elba-sd4hc +then: + properties: + reg: + minItems: 2 +else: + properties: + reg: + minItems: 1 + maxItems: 2 + unevaluatedProperties: false examples:
AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and explicitly controls byte-lane enables. Signed-off-by: Brad Larson <blarson@amd.com> --- Changes since v6: - Add reset-names and resets properties - Add if/then on property amd,pensando-elba-sd4hc to set reg property values for minItems and maxItems --- .../devicetree/bindings/mmc/cdns,sdhci.yaml | 28 ++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-)