| Message ID | 20230118075210.447418-9-perry.yuan@amd.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Implement AMD Pstate EPP Driver | expand |
On 1/18/2023 1:22 PM, Perry Yuan wrote: > From: Perry Yuan <Perry.Yuan@amd.com> > > The amd-pstate driver has two operation modes supported: > * CPPC Autonomous (active) mode > * CPPC non-autonomous (passive) mode. > active mode and passive mode can be chosen by different kernel parameters. > > Acked-by: Huang Rui <ray.huang@amd.com> > Tested-by: Wyes Karny <wyes.karny@amd.com> > Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Reviewed-by: Wyes Karny <wyes.karny@amd.com> > --- > Documentation/admin-guide/pm/amd-pstate.rst | 26 +++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst > index 98a2bb44f80c..b6aee69f564f 100644 > --- a/Documentation/admin-guide/pm/amd-pstate.rst > +++ b/Documentation/admin-guide/pm/amd-pstate.rst > @@ -299,8 +299,30 @@ module which supports the new AMD P-States mechanism on most of the future AMD > platforms. The AMD P-States mechanism is the more performance and energy > efficiency frequency management method on AMD processors. > > -Kernel Module Options for ``amd-pstate`` > -========================================= > + > +AMD Pstate Driver Operation Modes > +================================= > + > +``amd_pstate`` CPPC has two operation modes: CPPC Autonomous(active) mode and > +CPPC non-autonomous(passive) mode. > +active mode and passive mode can be chosen by different kernel parameters. > +When in Autonomous mode, CPPC ignores requests done in the Desired Performance > +Target register and takes into account only the values set to the Minimum requested > +performance, Maximum requested performance, and Energy Performance Preference > +registers. When Autonomous is disabled, it only considers the Desired Performance Target. > + > +Active Mode > +------------ > + > +``amd_pstate=active`` > + > +This is the low-level firmware control mode which is implemented by ``amd_pstate_epp`` > +driver with ``amd_pstate=active`` passed to the kernel in the command line. > +In this mode, ``amd_pstate_epp`` driver provides a hint to the hardware if software > +wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. > +then CPPC power algorithm will calculate the runtime workload and adjust the realtime > +cores frequency according to the power supply and thermal, core voltage and some other > +hardware conditions. > > Passive Mode > ------------
diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 98a2bb44f80c..b6aee69f564f 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -299,8 +299,30 @@ module which supports the new AMD P-States mechanism on most of the future AMD platforms. The AMD P-States mechanism is the more performance and energy efficiency frequency management method on AMD processors. -Kernel Module Options for ``amd-pstate`` -========================================= + +AMD Pstate Driver Operation Modes +================================= + +``amd_pstate`` CPPC has two operation modes: CPPC Autonomous(active) mode and +CPPC non-autonomous(passive) mode. +active mode and passive mode can be chosen by different kernel parameters. +When in Autonomous mode, CPPC ignores requests done in the Desired Performance +Target register and takes into account only the values set to the Minimum requested +performance, Maximum requested performance, and Energy Performance Preference +registers. When Autonomous is disabled, it only considers the Desired Performance Target. + +Active Mode +------------ + +``amd_pstate=active`` + +This is the low-level firmware control mode which is implemented by ``amd_pstate_epp`` +driver with ``amd_pstate=active`` passed to the kernel in the command line. +In this mode, ``amd_pstate_epp`` driver provides a hint to the hardware if software +wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. +then CPPC power algorithm will calculate the runtime workload and adjust the realtime +cores frequency according to the power supply and thermal, core voltage and some other +hardware conditions. Passive Mode ------------