Message ID | 20230107075118.1814503-10-richard.henderson@linaro.org |
---|---|
State | New |
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Series |
[PULL,01/27] tcg/s390x: Use register pair allocation for div and mulu2
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diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index 31d5510d2d..fc9ae82700 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -62,7 +62,6 @@ typedef enum TCGReg { /* Facilities that are checked at runtime. */ -#define FACILITY_FAST_BCR_SER 45 #define FACILITY_DISTINCT_OPS 45 #define FACILITY_LOAD_ON_COND2 53 #define FACILITY_VECTOR 129 diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 29a64ad0fe..dd58f0cdb5 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -2431,7 +2431,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, /* The host memory model is quite strong, we simply need to serialize the instruction stream. */ if (args[0] & TCG_MO_ST_LD) { - tcg_out_insn(s, RR, BCR, HAVE_FACILITY(FAST_BCR_SER) ? 14 : 15, 0); + /* fast-bcr-serialization facility (45) is present */ + tcg_out_insn(s, RR, BCR, 14, 0); } break;