Message ID | 20230105134729.59542-2-m.tretter@pengutronix.de |
---|---|
State | Accepted |
Commit | 3ac7165d7221421f7a44097f43ab7790e6f9432c |
Headers | show |
Series | [1/8] media: dt-bindings: media: fsl-pxp: convert to yaml | expand |
On Thu, 05 Jan 2023 21:18:21 -0600, Rob Herring wrote: > On Thu, 05 Jan 2023 14:47:22 +0100, Michael Tretter wrote: > > Convert the bindings of the Freescale Pixel Pipeline to YAML. > > > > The conversion drops the previously listed compatibles for several SoCs. > > It is unclear, if the PXP on these SoCs is compatible to any of the PXPs > > on the existing SoCs and would allow to reuse the already defined > > compatibles. The missing compatibles should be brought back when the > > support for the PXP on these SoCs is added. > > > > Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> > > --- > > .../bindings/media/fsl,imx6ull-pxp.yaml | 62 +++++++++++++++++++ > > .../devicetree/bindings/media/fsl-pxp.txt | 26 -------- > > 2 files changed, 62 insertions(+), 26 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > > delete mode 100644 Documentation/devicetree/bindings/media/fsl-pxp.txt > > > > Running 'make dtbs_check' with the schema in this patch gives the > following warnings. Consider if they are expected or the schema is > incorrect. These may not be new warnings. I am surprised that these warnings didn't show up when I ran 'make dtbs_check'. I will check if there is something wrong with my setup. > > Note that it is not yet a requirement to have 0 warnings for dtbs_check. > This will change in the future. > > Full log is available here: https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230105134729.59542-2-m.tretter@pengutronix.de > > > pxp@20f0000: compatible:0: 'fsl,imx6sll-pxp' is not one of ['fsl,imx6ul-pxp', 'fsl,imx6ull-pxp', 'fsl,imx7d-pxp'] > arch/arm/boot/dts/imx6sll-evk.dtb > arch/arm/boot/dts/imx6sll-kobo-clarahd.dtb > arch/arm/boot/dts/imx6sll-kobo-librah2o.dtb > > pxp@20f0000: compatible: ['fsl,imx6sll-pxp', 'fsl,imx6ull-pxp'] is too long > arch/arm/boot/dts/imx6sll-evk.dtb > arch/arm/boot/dts/imx6sll-kobo-clarahd.dtb > arch/arm/boot/dts/imx6sll-kobo-librah2o.dtb This is an error in the schema. I dropped the fsl,imx6sll-pxp and fsl,imx6sx-pxp compatibles, because I thought that they aren't used. I will send a v2 to fix the schema. Michael > > pxp@2218000: compatible:0: 'fsl,imx6sx-pxp' is not one of ['fsl,imx6ul-pxp', 'fsl,imx6ull-pxp', 'fsl,imx7d-pxp'] > arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb > arch/arm/boot/dts/imx6sx-sabreauto.dtb > arch/arm/boot/dts/imx6sx-sdb.dtb > arch/arm/boot/dts/imx6sx-sdb-mqs.dtb > arch/arm/boot/dts/imx6sx-sdb-reva.dtb > arch/arm/boot/dts/imx6sx-sdb-sai.dtb > arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb > > pxp@2218000: compatible: ['fsl,imx6sx-pxp', 'fsl,imx6ull-pxp'] is too long > arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb > arch/arm/boot/dts/imx6sx-sabreauto.dtb > arch/arm/boot/dts/imx6sx-sdb.dtb > arch/arm/boot/dts/imx6sx-sdb-mqs.dtb > arch/arm/boot/dts/imx6sx-sdb-reva.dtb > arch/arm/boot/dts/imx6sx-sdb-sai.dtb > arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb > > pxp@2218000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' > arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb > arch/arm/boot/dts/imx6sx-sabreauto.dtb > arch/arm/boot/dts/imx6sx-sdb.dtb > arch/arm/boot/dts/imx6sx-sdb-mqs.dtb > arch/arm/boot/dts/imx6sx-sdb-reva.dtb > arch/arm/boot/dts/imx6sx-sdb-sai.dtb > arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb > arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb > >
Hi Michael, Thank you for the patch. On Thu, Jan 05, 2023 at 02:47:22PM +0100, Michael Tretter wrote: > Convert the bindings of the Freescale Pixel Pipeline to YAML. > > The conversion drops the previously listed compatibles for several SoCs. > It is unclear, if the PXP on these SoCs is compatible to any of the PXPs > on the existing SoCs and would allow to reuse the already defined > compatibles. The missing compatibles should be brought back when the > support for the PXP on these SoCs is added. > > Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> > --- > .../bindings/media/fsl,imx6ull-pxp.yaml | 62 +++++++++++++++++++ > .../devicetree/bindings/media/fsl-pxp.txt | 26 -------- > 2 files changed, 62 insertions(+), 26 deletions(-) > create mode 100644 Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > delete mode 100644 Documentation/devicetree/bindings/media/fsl-pxp.txt > > diff --git a/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > new file mode 100644 > index 000000000000..e5f227b84759 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Freescale Pixel Pipeline > + > +maintainers: > + - Philipp Zabel <p.zabel@pengutronix.de> > + - Michael Tretter <m.tretter@pengutronix.de> > + > +description: > + The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine > + that supports scaling, colorspace conversion, alpha blending, rotation, and > + pixel conversion via lookup table. Different versions are present on various > + i.MX SoCs from i.MX23 to i.MX7. > + > +properties: > + compatible: > + enum: > + - fsl,imx6ul-pxp > + - fsl,imx6ull-pxp > + - fsl,imx7d-pxp > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 1 > + maxItems: 2 Can you make the number of items conditional on the compatible string ? > + > + clocks: > + maxItems: 1 > + > + clock-names: > + items: > + - const: axi I think this could be simplified to clock-names: const: axi Up to you. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + > +additionalProperties: False s/False/false/ > + > +examples: > + - | > + #include <dt-bindings/clock/imx6ul-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + pxp: pxp@21cc000 { > + compatible = "fsl,imx6ull-pxp"; > + reg = <0x021cc000 0x4000>; > + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "axi"; > + clocks = <&clks IMX6UL_CLK_PXP>; > + }; > diff --git a/Documentation/devicetree/bindings/media/fsl-pxp.txt b/Documentation/devicetree/bindings/media/fsl-pxp.txt > deleted file mode 100644 > index f8090e06530d..000000000000 > --- a/Documentation/devicetree/bindings/media/fsl-pxp.txt > +++ /dev/null > @@ -1,26 +0,0 @@ > -Freescale Pixel Pipeline > -======================== > - > -The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine > -that supports scaling, colorspace conversion, alpha blending, rotation, and > -pixel conversion via lookup table. Different versions are present on various > -i.MX SoCs from i.MX23 to i.MX7. > - > -Required properties: > -- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, > - imx6dl, imx6sl, imx6sll, imx6ul, imx6sx, imx6ull, or imx7d. > -- reg: the register base and size for the device registers > -- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d. > -- clock-names: should be "axi" > -- clocks: the PXP AXI clock > - > -Example: > - > -pxp@21cc000 { > - compatible = "fsl,imx6ull-pxp"; > - reg = <0x021cc000 0x4000>; > - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; > - clock-names = "axi"; > - clocks = <&clks IMX6UL_CLK_PXP>; > -};
On 05/01/2023 14:47, Michael Tretter wrote: > Convert the bindings of the Freescale Pixel Pipeline to YAML. > > The conversion drops the previously listed compatibles for several SoCs. > It is unclear, if the PXP on these SoCs is compatible to any of the PXPs > on the existing SoCs and would allow to reuse the already defined > compatibles. The missing compatibles should be brought back when the > support for the PXP on these SoCs is added. > Subject: only one "media" prefix. > Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> > --- > .../bindings/media/fsl,imx6ull-pxp.yaml | 62 +++++++++++++++++++ > .../devicetree/bindings/media/fsl-pxp.txt | 26 -------- > 2 files changed, 62 insertions(+), 26 deletions(-) > create mode 100644 Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > delete mode 100644 Documentation/devicetree/bindings/media/fsl-pxp.txt > > diff --git a/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > new file mode 100644 > index 000000000000..e5f227b84759 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" Drop qyotes from both. > + > +title: Freescale Pixel Pipeline > + > +maintainers: > + - Philipp Zabel <p.zabel@pengutronix.de> > + - Michael Tretter <m.tretter@pengutronix.de> > + > +description: > + The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine > + that supports scaling, colorspace conversion, alpha blending, rotation, and > + pixel conversion via lookup table. Different versions are present on various > + i.MX SoCs from i.MX23 to i.MX7. > + > +properties: > + compatible: > + enum: > + - fsl,imx6ul-pxp > + - fsl,imx6ull-pxp > + - fsl,imx7d-pxp > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 1 > + maxItems: 2 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + items: > + - const: axi > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names Add allOf:if:then restricting interrupts per variant. > + > +additionalProperties: False > + > +examples: > + - | > + #include <dt-bindings/clock/imx6ul-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml new file mode 100644 index 000000000000..e5f227b84759 --- /dev/null +++ b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Freescale Pixel Pipeline + +maintainers: + - Philipp Zabel <p.zabel@pengutronix.de> + - Michael Tretter <m.tretter@pengutronix.de> + +description: + The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine + that supports scaling, colorspace conversion, alpha blending, rotation, and + pixel conversion via lookup table. Different versions are present on various + i.MX SoCs from i.MX23 to i.MX7. + +properties: + compatible: + enum: + - fsl,imx6ul-pxp + - fsl,imx6ull-pxp + - fsl,imx7d-pxp + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: axi + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: False + +examples: + - | + #include <dt-bindings/clock/imx6ul-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + pxp: pxp@21cc000 { + compatible = "fsl,imx6ull-pxp"; + reg = <0x021cc000 0x4000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "axi"; + clocks = <&clks IMX6UL_CLK_PXP>; + }; diff --git a/Documentation/devicetree/bindings/media/fsl-pxp.txt b/Documentation/devicetree/bindings/media/fsl-pxp.txt deleted file mode 100644 index f8090e06530d..000000000000 --- a/Documentation/devicetree/bindings/media/fsl-pxp.txt +++ /dev/null @@ -1,26 +0,0 @@ -Freescale Pixel Pipeline -======================== - -The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine -that supports scaling, colorspace conversion, alpha blending, rotation, and -pixel conversion via lookup table. Different versions are present on various -i.MX SoCs from i.MX23 to i.MX7. - -Required properties: -- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, - imx6dl, imx6sl, imx6sll, imx6ul, imx6sx, imx6ull, or imx7d. -- reg: the register base and size for the device registers -- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d. -- clock-names: should be "axi" -- clocks: the PXP AXI clock - -Example: - -pxp@21cc000 { - compatible = "fsl,imx6ull-pxp"; - reg = <0x021cc000 0x4000>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "axi"; - clocks = <&clks IMX6UL_CLK_PXP>; -};
Convert the bindings of the Freescale Pixel Pipeline to YAML. The conversion drops the previously listed compatibles for several SoCs. It is unclear, if the PXP on these SoCs is compatible to any of the PXPs on the existing SoCs and would allow to reuse the already defined compatibles. The missing compatibles should be brought back when the support for the PXP on these SoCs is added. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> --- .../bindings/media/fsl,imx6ull-pxp.yaml | 62 +++++++++++++++++++ .../devicetree/bindings/media/fsl-pxp.txt | 26 -------- 2 files changed, 62 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml delete mode 100644 Documentation/devicetree/bindings/media/fsl-pxp.txt