| Message ID | 1457937907-14008-2-git-send-email-majun258@huawei.com |
|---|---|
| State | Superseded |
| Headers | show |
Hi Thomas: Thanks for pointing out the problems. I'll make detail description about this problem and resend this patch set. 在 2016/3/14 15:49, Thomas Gleixner 写道: > Majun, > > On Mon, 14 Mar 2016, MaJun wrote: > > First of all the prefix for irq chip drivers is not "Irq/". > > Hint: git log drivers/irqchip > >> From: Ma Jun <majun258@huawei.com> >> >> For mbigen module, there is a special case that more than one mbigen >> device nodes use the same reg definition in DTS when these devices >> exist in the same mbigen hardware module. > > There is a special case, so what? > In current driver, the registers would be remapped repeatedly and caused error when use the function "devm_ioremap_resource". That's the problem I tried to fix. >> To fix the mbigen IO remap problem, the mbigen node definition and > > Which problem? > >> structure are changed based on Mark Rutland's suggestion. > > That's really uselss. Nobody has any idea what Mark suggested and in which way > it fixes that unspecified problem you are talking about. > Actually, I discussed this problem with Mark in v1. He raised some questions and suggestions http://lists.infradead.org/pipermail/linux-arm-kernel/2016-February/403691.html Thanks! MaJun > Thanks, > > tglx > > . >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt index 720f7c9..3b2f4c4 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.txt @@ -21,6 +21,8 @@ Mbigen main node required properties: - reg: Specifies the base physical address and size of the Mbigen registers. +Mbigen sub node required properties: +------------------------------------------ - interrupt controller: Identifies the node as an interrupt controller - msi-parent: Specifies the MSI controller this mbigen use. @@ -45,13 +47,23 @@ Mbigen main node required properties: Examples: - mbigen_device_gmac:intc { + mbigen_chip_dsa { compatible = "hisilicon,mbigen-v2"; reg = <0x0 0xc0080000 0x0 0x10000>; - interrupt-controller; - msi-parent = <&its_dsa 0x40b1c>; - num-pins = <9>; - #interrupt-cells = <2>; + + mbigen_gmac:intc_gmac { + interrupt-controller; + msi-parent = <&its_dsa 0x40b1c>; + num-pins = <9>; + #interrupt-cells = <2>; + }; + + mbigen_i2c:intc_i2c { + interrupt-controller; + msi-parent = <&its_dsa 0x40b0e>; + num-pins = <2>; + #interrupt-cells = <2>; + }; }; Devices connect to mbigen required properties: