diff mbox series

[v2,07/23] clk: mediatek: clk-mtk: Add dummy clock ops

Message ID 20221223094259.87373-8-angelogioacchino.delregno@collabora.com
State New
Headers show
Series MediaTek clocks cleanups and improvements | expand

Commit Message

AngeloGioacchino Del Regno Dec. 23, 2022, 9:42 a.m. UTC
In order to migrate some (few) old clock drivers to the common
mtk_clk_simple_probe() function, add dummy clock ops to be able
to insert a dummy clock with ID 0 at the beginning of the list.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/clk/mediatek/clk-mtk.c | 15 +++++++++++++++
 drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++
 2 files changed, 34 insertions(+)

Comments

Chen-Yu Tsai Dec. 30, 2022, 5:19 a.m. UTC | #1
On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> In order to migrate some (few) old clock drivers to the common
> mtk_clk_simple_probe() function, add dummy clock ops to be able
> to insert a dummy clock with ID 0 at the beginning of the list.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  drivers/clk/mediatek/clk-mtk.c | 15 +++++++++++++++
>  drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++
>  2 files changed, 34 insertions(+)
>
> diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
> index a1ab34305b95..d05364e17e95 100644
> --- a/drivers/clk/mediatek/clk-mtk.c
> +++ b/drivers/clk/mediatek/clk-mtk.c
> @@ -18,6 +18,21 @@
>  #include "clk-mtk.h"
>  #include "clk-gate.h"
>
> +const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };

You could probably just use an empty { }, since the contents don't matter.
It would make any possible future changes to |struct mtk_gate_regs| touch
one less place.

Otherwise,

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> +
> +static int mtk_clk_dummy_enable(struct clk_hw *hw)
> +{
> +       return 0;
> +}
> +
> +static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
> +
> +const struct clk_ops mtk_clk_dummy_ops = {
> +       .enable         = mtk_clk_dummy_enable,
> +       .disable        = mtk_clk_dummy_disable,
> +};
> +EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
> +
>  static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
>                               unsigned int clk_num)
>  {
> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> index 15122504c02d..dd43235285db 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -22,6 +22,25 @@
>
>  struct platform_device;
>
> +/*
> + * We need the clock IDs to start from zero but to maintain devicetree
> + * backwards compatibility we can't change bindings to start from zero.
> + * Only a few platforms are affected, so we solve issues given by the
> + * commonized MTK clocks probe function(s) by adding a dummy clock at
> + * the beginning where needed.
> + */
> +#define CLK_DUMMY              0
> +
> +extern const struct clk_ops mtk_clk_dummy_ops;
> +extern const struct mtk_gate_regs cg_regs_dummy;
> +
> +#define GATE_DUMMY(_id, _name) {                               \
> +               .id = _id,                                      \
> +               .name = _name,                                  \
> +               .regs = &cg_regs_dummy,                         \
> +               .ops = &mtk_clk_dummy_ops,                      \
> +       }
> +
>  struct mtk_fixed_clk {
>         int id;
>         const char *name;
> --
> 2.39.0
>
diff mbox series

Patch

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index a1ab34305b95..d05364e17e95 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -18,6 +18,21 @@ 
 #include "clk-mtk.h"
 #include "clk-gate.h"
 
+const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
+
+static int mtk_clk_dummy_enable(struct clk_hw *hw)
+{
+	return 0;
+}
+
+static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
+
+const struct clk_ops mtk_clk_dummy_ops = {
+	.enable		= mtk_clk_dummy_enable,
+	.disable	= mtk_clk_dummy_disable,
+};
+EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
+
 static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
 			      unsigned int clk_num)
 {
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 15122504c02d..dd43235285db 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -22,6 +22,25 @@ 
 
 struct platform_device;
 
+/*
+ * We need the clock IDs to start from zero but to maintain devicetree
+ * backwards compatibility we can't change bindings to start from zero.
+ * Only a few platforms are affected, so we solve issues given by the
+ * commonized MTK clocks probe function(s) by adding a dummy clock at
+ * the beginning where needed.
+ */
+#define CLK_DUMMY		0
+
+extern const struct clk_ops mtk_clk_dummy_ops;
+extern const struct mtk_gate_regs cg_regs_dummy;
+
+#define GATE_DUMMY(_id, _name) {				\
+		.id = _id,					\
+		.name = _name,					\
+		.regs = &cg_regs_dummy,				\
+		.ops = &mtk_clk_dummy_ops,			\
+	}
+
 struct mtk_fixed_clk {
 	int id;
 	const char *name;