@@ -3248,7 +3248,7 @@ aoss_reset: reset-controller@c2a0000 {
#reset-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sc7180-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
@@ -4257,7 +4257,7 @@ aoss_reset: reset-controller@c2a0000 {
#reset-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sc7280-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
@@ -1921,7 +1921,7 @@ tsens1: thermal-sensor@c265000 {
#thermal-sensor-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sc8280xp-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>;
@@ -4965,7 +4965,7 @@ aoss_reset: reset-controller@c2a0000 {
#reset-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
@@ -1273,7 +1273,7 @@ tsens1: thermal-sensor@c265000 {
#thermal-sensor-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sm6350-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x1000>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
@@ -3589,7 +3589,7 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sm8150-aoss-qmp", "qcom,aoss-qmp";
reg = <0x0 0x0c300000 0x0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
@@ -3741,7 +3741,7 @@ tsens1: thermal-sensor@c265000 {
#thermal-sensor-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
@@ -1717,7 +1717,7 @@ tsens1: thermal-sensor@c265000 {
#thermal-sensor-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
@@ -2453,7 +2453,7 @@ tsens1: thermal-sensor@c265000 {
#thermal-sensor-cells = <1>;
};
- aoss_qmp: power-controller@c300000 {
+ aoss_qmp: power-management@c300000 {
compatible = "qcom,sm8450-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
The Always On Subsystem (AOSS) QMP is not a power domain controller since commit 135780456218 ("arm64: dts: qcom: sc7180: Use QMP property to control load state") and few others. In fact, it was never a power domain controller but rather control of power state of remote processors. This power state control is now handled differently, thus the AOSS QMP nodes do not have power-domain-cells: sc7280-idp.dtb: power-controller@c300000: '#power-domain-cells' is a required property From schema: Documentation/devicetree/bindings/power/power-domain.yaml AOSS QMP is an interface to the actuall AOSS subsystem responsible for some of power management functions, thus let's call the nodes as "power-management". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Changes since v1: 1. Call the nodes "power-management" --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-)