| Message ID | 20221212133303.39610-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/4] arm64: dts: qcom: sc7180: correct SPMI bus address cells | expand |
On 12.12.2022 14:32, Krzysztof Kozlowski wrote: > The SPMI bus uses two address cells and zero size cells (secoond reg secoond sounds very Dutch ;) > entry - SPMI_USID - is not the size): > > spmi@c440000: #address-cells:0:0: 2 was expected > > Fixes: 0f9dc5f09fbd ("arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Interesting that it worked with this wrong.. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index eb1e1ea12ff6..906fb9343bcc 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -3274,8 +3274,8 @@ spmi_bus: spmi@c440000 { > interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; > qcom,ee = <0>; > qcom,channel = <0>; > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <0>; > interrupt-controller; > #interrupt-cells = <4>; > cell-index = <0>;
On 12.12.2022 14:33, Krzysztof Kozlowski wrote: > The SPMI bus uses two address cells and zero size cells (secoond reg secoond > entry - SPMI_USID - is not the size): > > spmi@c440000: #address-cells:0:0: 2 was expected > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 27f5c2f82338..3cb4ca6c53eb 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -1947,8 +1947,8 @@ spmi_bus: spmi@c440000 { > interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; > qcom,ee = <0>; > qcom,channel = <0>; > - #address-cells = <1>; > - #size-cells = <1>; > + #address-cells = <2>; > + #size-cells = <0>; > interrupt-controller; > #interrupt-cells = <4>; > };
On 12/12/2022 14:35, Konrad Dybcio wrote: > > > On 12.12.2022 14:32, Krzysztof Kozlowski wrote: >> The SPMI bus uses two address cells and zero size cells (secoond reg > secoond sounds very Dutch ;) Indeed... Best regards, Krzysztof
Quoting Krzysztof Kozlowski (2022-12-12 05:32:59) > The SPMI bus uses two address cells and zero size cells (secoond reg > entry - SPMI_USID - is not the size): > > spmi@c440000: #address-cells:0:0: 2 was expected > > Fixes: 0f9dc5f09fbd ("arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Quoting Krzysztof Kozlowski (2022-12-12 05:33:01) > The SPMI bus uses two address cells and zero size cells (secoond reg > entry - SPMI_USID - is not the size): > > spmi@c440000: #address-cells:0:0: 2 was expected > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index eb1e1ea12ff6..906fb9343bcc 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3274,8 +3274,8 @@ spmi_bus: spmi@c440000 { interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; interrupt-controller; #interrupt-cells = <4>; cell-index = <0>;
The SPMI bus uses two address cells and zero size cells (secoond reg entry - SPMI_USID - is not the size): spmi@c440000: #address-cells:0:0: 2 was expected Fixes: 0f9dc5f09fbd ("arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)