@@ -52,6 +52,9 @@ properties:
interrupts:
maxItems: 1
+ power-domains:
+ maxItems: 1
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: The LCDIF output port
@@ -81,7 +84,31 @@ allOf:
maxItems: 3
required:
- clock-names
- else:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mp-lcdif
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ minItems: 3
+ maxItems: 3
+ required:
+ - clock-names
+ - power-domains
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx6sx-lcdif
+ - fsl,imx8mp-lcdif
+ then:
properties:
clocks:
maxItems: 1
i.MX8MP uses 3 clocks, so soften the restrictions for clocks & clock-names. This SoC requires a power-domain for this peripheral to use. Add it as a required property. Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible for i.MX8MP") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- Changes in v3: * Removed power-domains minItems: 1 constraint Changes in v2: * Squash both patches into one * Split the conditionals from fsl,imx6sx-lcdif * Mark power-domains as required for fsl,imx8mp-lcdif * Ignored the A-b & R-b due to reorganization .../bindings/display/fsl,lcdif.yaml | 29 ++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-)