@@ -125,6 +125,11 @@
QCOM_SMD_RPM_CLK_BUF_A, r_id, r, \
QCOM_RPM_KEY_SOFTWARE_ENABLE)
+#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(_platform, _prefix, _name, r_id, r) \
+ __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _prefix, _name, _name##_a, \
+ QCOM_SMD_RPM_CLK_BUF_A, r_id, r, \
+ QCOM_RPM_KEY_SOFTWARE_ENABLE)
+
#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, \
r_id, r) \
DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, \
@@ -474,7 +479,7 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000);
DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000);
DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000);
-DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(qcm2290, 38m4_, rf_clk3, 6, 38400000);
DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000);
DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000);
@@ -1164,8 +1169,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = {
[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
- [RPM_SMD_RF_CLK3] = &qcm2290_rf_clk3,
- [RPM_SMD_RF_CLK3_A] = &qcm2290_rf_clk3_a,
+ [RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
+ [RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
Rename the qcm2290_rf_clk3 clocks adding 38m4 prefix to distinguish it form the common (19.2 MHz) rf_clk3. The system (and userspace) name of these clocks remains intact. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/clk-smd-rpm.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)