Message ID | 20221205230116.2204-3-mailingradian@gmail.com |
---|---|
State | Superseded |
Headers | show |
Series | None | expand |
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 933ad2fabf3a..2a44cccc47ee 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -736,6 +736,11 @@ qfprom: qfprom@780000 { reg = <0 0x780000 0 0x1000>; #address-cells = <1>; #size-cells = <1>; + + qusb2p_hstx_trim: hstx-trim-primary@1eb { + reg = <0x1eb 0x1>; + bits = <1 4>; + }; }; sdhc_1: mmc@7c4000 { @@ -1418,6 +1423,8 @@ usb_1_hsphy: phy@88e2000 { resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + nvmem-cells = <&qusb2p_hstx_trim>; + status = "disabled"; };
This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670 so there is proper tuning. Signed-off-by: Richard Acayan <mailingradian@gmail.com> --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)