arm64: mm: list kernel sections in order

Message ID	1456525992-17297-1-git-send-email-ard.biesheuvel@linaro.org
State	Accepted
Commit	a6e1f7273b709328ed19e1b8ca5ae61dc1d9b4c0
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; From: Ard Biesheuvel <ard.biesheuvel@linaro.org> To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com Subject: [PATCH] arm64: mm: list kernel sections in order Date: Fri, 26 Feb 2016 23:33:12 +0100 Message-Id: <1456525992-17297-1-git-send-email-ard.biesheuvel@linaro.org> summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:232 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain Precedence: list Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org

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1456525992-17297-1-git-send-email-ard.biesheuvel@linaro.org

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Accepted

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a6e1f7273b709328ed19e1b8ca5ae61dc1d9b4c0

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	linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org
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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: linux-arm-kernel@lists.infradead.org,
	catalin.marinas@arm.com
Subject: [PATCH] arm64: mm: list kernel sections in order
Date: Fri, 26 Feb 2016 23:33:12 +0100
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Commit Message

Ard Biesheuvel Feb. 26, 2016, 10:33 p.m. UTC

In the boot log, instead of listing .init first, list .text, .rodata,
.init and .data in the same order they appear in memory

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 arch/arm64/mm/init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.5.0


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Comments

Catalin Marinas Feb. 29, 2016, 5:19 p.m. UTC | #1

On Fri, Feb 26, 2016 at 11:33:12PM +0100, Ard Biesheuvel wrote:
> In the boot log, instead of listing .init first, list .text, .rodata,

> .init and .data in the same order they appear in memory

> 

> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>


Applied. Thanks.

-- 
Catalin

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diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index e832f4ab0916..be64ff8b4280 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -361,9 +361,9 @@  void __init mem_init(void)
 #endif
 		  "    modules : 0x%16lx - 0x%16lx   (%6ld MB)\n"
 		  "    vmalloc : 0x%16lx - 0x%16lx   (%6ld GB)\n"
-		  "      .init : 0x%p" " - 0x%p" "   (%6ld KB)\n"
 		  "      .text : 0x%p" " - 0x%p" "   (%6ld KB)\n"
 		  "    .rodata : 0x%p" " - 0x%p" "   (%6ld KB)\n"
+		  "      .init : 0x%p" " - 0x%p" "   (%6ld KB)\n"
 		  "      .data : 0x%p" " - 0x%p" "   (%6ld KB)\n"
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 		  "    vmemmap : 0x%16lx - 0x%16lx   (%6ld GB maximum)\n"
@@ -377,9 +377,9 @@  void __init mem_init(void)
 #endif
 		  MLM(MODULES_VADDR, MODULES_END),
 		  MLG(VMALLOC_START, VMALLOC_END),
-		  MLK_ROUNDUP(__init_begin, __init_end),
 		  MLK_ROUNDUP(_text, __start_rodata),
 		  MLK_ROUNDUP(__start_rodata, _etext),
+		  MLK_ROUNDUP(__init_begin, __init_end),
 		  MLK_ROUNDUP(_sdata, _edata),
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 		  MLG(VMEMMAP_START,

arm64: mm: list kernel sections in order

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Patch