Message ID | 20221125090141.3626747-1-cuigaosheng1@huawei.com |
---|---|
State | New |
Headers | show |
Series | mmc: mtk-sd: Fix missing clk_disable_unprepare in msdc_of_clock_parse() | expand |
On Fri, 25 Nov 2022 at 10:01, Gaosheng Cui <cuigaosheng1@huawei.com> wrote: > > The clk_disable_unprepare() should be called in the error handling > of devm_clk_bulk_get_optional, fix it by replacing devm_clk_get_optional > and clk_prepare_enable by devm_clk_get_optional_enabled. > > Fixes: f5eccd94b63f ("mmc: mediatek: Add subsys clock control for MT8192 msdc") > Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Applied for fixes and by adding a stable tag, thanks! Kind regards Uffe > --- > drivers/mmc/host/mtk-sd.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index 0f06cc5fec86..abadfc319053 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -2605,13 +2605,11 @@ static int msdc_of_clock_parse(struct platform_device *pdev, > return PTR_ERR(host->src_clk_cg); > } > > - host->sys_clk_cg = devm_clk_get_optional(&pdev->dev, "sys_cg"); > + /* If present, always enable for this clock gate */ > + host->sys_clk_cg = devm_clk_get_optional_enabled(&pdev->dev, "sys_cg"); > if (IS_ERR(host->sys_clk_cg)) > host->sys_clk_cg = NULL; > > - /* If present, always enable for this clock gate */ > - clk_prepare_enable(host->sys_clk_cg); > - > host->bulk_clks[0].id = "pclk_cg"; > host->bulk_clks[1].id = "axi_cg"; > host->bulk_clks[2].id = "ahb_cg"; > -- > 2.25.1 >
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 0f06cc5fec86..abadfc319053 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -2605,13 +2605,11 @@ static int msdc_of_clock_parse(struct platform_device *pdev, return PTR_ERR(host->src_clk_cg); } - host->sys_clk_cg = devm_clk_get_optional(&pdev->dev, "sys_cg"); + /* If present, always enable for this clock gate */ + host->sys_clk_cg = devm_clk_get_optional_enabled(&pdev->dev, "sys_cg"); if (IS_ERR(host->sys_clk_cg)) host->sys_clk_cg = NULL; - /* If present, always enable for this clock gate */ - clk_prepare_enable(host->sys_clk_cg); - host->bulk_clks[0].id = "pclk_cg"; host->bulk_clks[1].id = "axi_cg"; host->bulk_clks[2].id = "ahb_cg";
The clk_disable_unprepare() should be called in the error handling of devm_clk_bulk_get_optional, fix it by replacing devm_clk_get_optional and clk_prepare_enable by devm_clk_get_optional_enabled. Fixes: f5eccd94b63f ("mmc: mediatek: Add subsys clock control for MT8192 msdc") Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> --- drivers/mmc/host/mtk-sd.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)